參數(shù)資料
型號： EWIXP460AC
廠商： INTEL CORP
元件分類： 微控制器/微處理器
英文描述： 400 MHz, RISC PROCESSOR, PBGA544
封裝： LEAD FREE, PLASTIC, BGA-544
文件頁數(shù)： 63/163頁
文件大?。?/td> 1123K
代理商： EWIXP460AC
Electrical Specifications
Intel IXP45X and Intel IXP46X Product Line of Network Processors Datasheet
May 2005
Document Number: 306261-002
155
5.6.2.7.3
EX_IOWAIT_N
The EX_IOWAIT_N signal is available to be shared by devices attached to chip selects 0 through
7, when configured in Intel or Motorola modes of operation. The shared device will assert
EX_IOWAIT_N in the T2 phase or a read or write transaction. During idle cycles, the board is
responsible for ensuring that EX_IOWAIT_N is pulled-up. The Expansion bus controller will
always ignore EX_IOWAIT_N for Synchronous Intel mode writes.
When an external device asserts EX_IOWAIT_N before the first cycle of a Strobe phase of a read
or write transaction, the Expansion bus controller will hold in the Strobe phase until the
EX_IOWAIT_N signal returns to an inactive state. Since there is a synchronizer cell on
EX_IOWAIT_N, the external device must assert EX_IOWAIT_N three cycles before the
deassertion of EX_WR_N/EX_RD_N. This implies that the value programmed in the T2 and T3
phase cannot both be equal to zero. After EX_IOWAIT_N is deasserted the Expansion bus
controller will transition to the T4 - Hold state after the T3 counter reaches zero.
The EX_IOWAIT_N signal only affects the interface during the strobe phase of a read/write
transfer. If Chip Selects 4 through 7 are configured in HPI mode of operation, each chip select will
have a corresponding HRDY signal called EX_RDY. The polarity of the ready signal is
programmable. Chip Select 4 corresponds to EX_RDY signal 0 and Chip Select 7 corresponds to
EX_RDY signal 3.
Figure 42.
Expansion Bus I/O Wait
NOTE:
Notice that the access is an Intel-style simplex read access. The data strobe phase is set to a value to last
three clock cycles. The data is returned from the peripheral device prior to the three clocks and the
peripheral device de-asserts EX_IOWAIT_N. The data strobe phase terminates after two clocks even though
the strobe phase was configured to pulse for three clocks.
A9589-01
(1 Cycle)
(3 Cycles)
(1 Cycle)
EX_CLK
EX_CS_N
EX_ADDR
EX_IOWAIT_N
EX_RD_N
EX_DATA
T1
T2
T3
T4
T5
Valid Address
Valid Data
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