參數(shù)資料
型號: EWIXP460AC
廠商: INTEL CORP
元件分類: 微控制器/微處理器
英文描述: 400 MHz, RISC PROCESSOR, PBGA544
封裝: LEAD FREE, PLASTIC, BGA-544
文件頁數(shù): 24/163頁
文件大小: 1123K
代理商: EWIXP460AC
Product Features
May 2005
Intel IXP45X and Intel IXP46X Product Line of Network Processors Datasheet
12
Document Number: 306261-002
— Two one-shot timers
Packaging
—544-pin PBGA
— Commercial temperature (0° to 70° C)
— Extended temperature (-40° to 85° C)
— Lead Free Support
The remaining features described in the product line features list require software in order
for these features to be functional. To determine if the feature is enabled, see the Intel
IXP400 Software Programmer’s Guide.
Three network processor engines (NPEs)Note 1
Used to off load typical Layer-2 networking functions such as:
— Ethernet filtering
—ATM SARing
—HDLC
— Layer-2 switching
— Security acceleration (AES/DES3/SHA/MD-5)
Configurable Network Interface, configurable in the following manner: Notes 1, 3
— Three MII/SMII/SS-SMII interfaces
— Two MII/SMII/SS-SMII interface + 1 UTOPIA Level 2 interface
— One MII/SMII/SS-SMII interface + 1 UTOPIA Level 2 interface + four SMII/SS-SMII
interfaces
— Two MII/SMII/SS-SMII interfaces + four SMII/SS-SMII interfaces
MII/SMII/SS-SMII interfaces are: Note 1
— 802.3 MII interfaces that additionally support SMII/SS-SMII interfaces
— Single MDIO interface to control the MII/SMII/SS-SMII interfaces
UTOPIA Level 2 Interface is: Note 1
— Eight-bit interface
— Up to 33-MHz clock speed
— Five transmit and five receive address lines
Encryption/Authentication Note 1
—DES
—DES3
— AES 128-bit and 256-bit
— Single-pass AES-CCM
— SHA-1, SHA-256, SHA-384, SHA-512
—MD-5
Two high-speed, serial interfaces Note 1
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