1.8 Volt Intel
Wireless Flash Memory with 3 Volt I/O
Datasheet
17
3.1.5
Write
A write occurs when CE# and WE# are asserted and OE# is deasserted. Flash control commands
are written to the CUI using standard microprocessor write timings. Proper use of the ADV# input
is needed for proper latching of the addresses. Refer to
Section 11.2, “AC Write Characteristics” on
page 69
for details. The address and data are latched on the rising edge of WE#. Write operations
are asynchronous; CLK is ignored (but still may be kept active/toggling).
The CUI does not occupy an addressable memory location within any partition. The system
processor must access it at the correct address range depending on the kind of command executed.
Programming or erasing may occur in only one partition at a time. Other partitions must be in one
of the read modes or erase suspend mode.
Table 5, “Command Codes and Descriptions” on page 17
shows the available commands.
Appendix A, “Write State Machine States” on page 77
provides information on moving between
different operating modes using CUI commands.
3.2
Device Commands
The device’s on-chip WSM manages erase and program algorithms. This local CPU (WSM)
controls the device’s in-system read, program, and erase operations. Bus cycles to or from the flash
memory conform to standard microprocessor bus cycles. RST#, CE#, OE#, WE#, and ADV#
control signals dictate data flow into and out of the device. WAIT informs the CPU of valid data
during burst reads.
Table 4, “Bus Operations” on page 15
summarizes bus operations.
Device operations are selected by writing specific commands into the device’s CUI.
Table 5,
“Command Codes and Descriptions” on page 17
lists all possible command codes and
descriptions.
Table 6, “Bus Cycle Definitions” on page 19
lists command definitions. Because
commands are partition-specific, it is important to issue write commands within the target address
range.
Table 5.
Command Codes and Descriptions (Sheet 1 of 2)
Operation
Code
Device
Command
Description
Read
FFh
Read Array
Places selected partition in read-array mode.
70h
Read Status
Register
Places selected partition in status register read mode. The partition enters this
mode after a Program or Erase command is issued to it.
90h
Read Identifier
Puts the selected partition in read identifier mode. Device reads from partition
addresses output manufacturer/device codes, configuration register data, block
lock status, or protection register data on D[15:0].
98h
Read Query
Puts the addressed partition in read query mode. Device reads from the partition
addresses output CFI information on D[7:0].
50h
Clear Status
Register
The WSM can set the status register’s block lock (SR[1]), V
PP
(SR[3]), program
(SR[4]), and erase (SR[5]) status bits, but it cannot clear them. SR[5:3,1] can only
be cleared by a device reset or through the Clear Status Register command.