參數(shù)資料
型號: GE28F128W30T90
英文描述: EEPROM|FLASH|8MX16|CMOS|BGA|60PIN|PLASTIC
中文描述: 的EEPROM | FLASH動畫| 8M × 16位|的CMOS | BGA封裝| 60PIN |塑料
文件頁數(shù): 66/91頁
文件大小: 994K
代理商: GE28F128W30T90
1.8 Volt Intel
Wireless Flash Memory with 3 Volt I/O
66
Datasheet
NOTES:
1.
Section 8.2, “First Access Latency Count (CR[13:11])” on page 45
describes how to insert clock cycles during
the initial access.
2. WAIT (shown asserted; CR.10=0) can be configured to assert either during, or one data cycle before, valid
data. (assumed wait delay of two clocks for example)
Figure 24. WAIT Functionality for EOWL (End-of-Word Line) Condition Waveform
V
IH
V
IL
V
OH
V
OL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
Valid
Address
V
IH
V
IL
Note 1
V
OH
V
OL
Valid
Output
Valid
Output
Valid
Output
Valid
Output
High Z
R105
R102
R301
R302
R306
R101
R2
R106
R103
R3
R4
R7
R304
R5
R305
0
1
RST# [P]
WAIT [T]
WE# [W]
OE# [G]
CE# [E]
ADV# [V]
Address [A]
CLK [C]
Data [D/Q]
Note 2
R104
R303
R307
High Z
R308
High Z
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