- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄375996 > GE28F128W30T90 EEPROM|FLASH|8MX16|CMOS|BGA|60PIN|PLASTIC PDF資料下載
參數(shù)資料
| 型號： | GE28F128W30T90 |
| 英文描述： | EEPROM|FLASH|8MX16|CMOS|BGA|60PIN|PLASTIC |
| 中文描述： | 的EEPROM | FLASH動畫| 8M × 16位|的CMOS | BGA封裝| 60PIN |塑料 |
| 文件頁數(shù)： | 51/91頁 |
| 文件大?。?/td> | 994K |
| 代理商： | GE28F128W30T90 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁當(dāng)前第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁
1.8 Volt Intel
Wireless Flash Memory with 3 Volt I/O
Datasheet
51
NOTE:
Available on the .13 μm lithography
8.8
Clock Edge (CR[6])
Configuring the valid clock edge enables a flexible memory interface to a wide range of burst
CPUs. Clock configuration sets the device to start a burst cycle, output data, and assert WAIT on
the clock’s rising or falling edge.
8.9
Burst Wrap (CR[3])
The burst wrap bit determines whether 4-, 8-, or 16-word burst accesses wrap within the burst-
length boundary or whether they cross word-length boundaries to perform linear accesses. No-
wrap mode (CR[3]=1) enables WAIT to hold off the system processor, as it does in the continuous
burst mode, until valid data is available. In no-wrap mode (CR[3]=0), the device operates similarly
to continuous linear burst mode but consumes less power during 4-, 8-, or 16-word bursts.
For example, if CR[3]=0 (wrap mode) and CR[2:0] = 1h (4-word burst), possible linear burst
sequences are 0-1-2-3, 1-2-3-0, 2-3-0-1, 3-0-1-2.
If CR[3]=1 (no-wrap mode) and CR[2:0] = 1h (4-word burst length), then possible linear burst
sequences are 0-1-2-3, 1-2-3-4, 2-3-4-5, and 3-4-5-6. CR[3]=1 not only enables limited non-
aligned sequential bursts, but also reduces power by minimizing the number of internal read
operations.
Setting CR[2:0] bits for continuous linear burst mode (7h) also achieves the above 4-word burst
sequences. However, significantly more power may be consumed. The 1-2-3-4 sequence, for
example, consumes power during the initial access, again during the internal pipeline lookup as the
N
0
0-1-2-3
NA
0-1-2-3-4-5-6-7
NA
0-1-2...14-15
NA
0-1-2-3-4-5-6-...
1
1-2-3-4
NA
1-2-3-4-5-6-7-8
NA
1-2-3...15-16
NA
1-2-3-4-5-6-7-...
2
2-3-4-5
NA
2-3-4-5-6-7-8-9
NA
2-3-4...16-17
NA
2-3-4-5-6-7-8-...
3
3-4-5-6
NA
3-4-5-6-7-8-9-
10
NA
3-4-5...17-18
NA
3-4-5-6-7-8-9-...
4
4-5-6-7-8-9-10-
11
NA
4-5-6...18-19
NA
4-5-6-7-8-9-10...
5
5-6-7-8-9-10-
11-12
NA
5-6-7...19-20
NA
5-6-7-8-9-10-11...
6
6-7-8-9-10-11-
12-13
NA
6-7-8...20-21
NA
6-7-8-9-10-11-12-
...
7
7-8-9-10-11-
12-13-14
NA
7-8-9...21-22
NA
7-8-9-10-11-12-
13...
.
.
.
.
.
.
.
.
14
14-15...28-29
NA
14-15-16-17-18-
19-20-...
15
15-16...29-30
NA
15-16-17-18-19-
20-21-...
Table 16. Sequence and Burst Length (Sheet 2 of 2)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| GE28F640W30B70 | EEPROM|FLASH|4MX16|CMOS|BGA|56PIN|PLASTIC |
| GE28F640W30B85 | EEPROM|FLASH|4MX16|CMOS|BGA|56PIN|PLASTIC |
| GE28F640W30T70 | EEPROM|FLASH|4MX16|CMOS|BGA|56PIN|PLASTIC |
| GE28F640W30T85 | EEPROM|FLASH|4MX16|CMOS|BGA|56PIN|PLASTIC |
| GF4435 | TRANSISTOR | MOSFET | P-CHANNEL | 30V V(BR)DSS | 8A I(D) | SO |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GE28F160B3BC70 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:3 Volt Advanced Boot Block Flash Memory |
| GE28F160B3BC80 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:3 Volt Advanced Boot Block Flash Memory |
| GE28F160B3TC70 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:3 Volt Advanced Boot Block Flash Memory |
| GE28F160B3TC80 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:3 Volt Advanced Boot Block Flash Memory |
| GE28F160C3BA70 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Advanced+ Boot Block Flash Memory (C3) |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。