參數(shù)資料
型號(hào): LH28F320S5H-L
廠商: Sharp Corporation
英文描述: 32M-BIT ( 2Mbit x16 / 4Mbit x8 )Boot Block Flash MEMORY(32M位( 2M位 x16 / 4M位 x8 )Boot Block 閃速存儲(chǔ)器)
中文描述: 32兆位(2Mbit的x16 /的4Mb × 8)啟動(dòng)塊閃存(32兆位(200萬(wàn)位x16 / 4分位× 8)啟動(dòng)塊閃速存儲(chǔ)器)
文件頁(yè)數(shù): 32/50頁(yè)
文件大小: 338K
代理商: LH28F320S5H-L
PRELMNARY
Clear Block Lock-Bits
Successful
LH28F320S5-L/S5H-L
- 32 -
Clear Block
Lock-Bits Complete
Start
Write 60H
Read
Status Register
0
SR.7 =
1
Full Status
Check if Desired
Write FFH after the last clear block lock-bits operation to
place device in read array mode.
BUS
OPERATION
Write
Write
Read
Standby
COMMAND
Clear Block
Lock-Bits
Setup
COMMENTS
Data = 60H
Addr = X
Data = D0H
Addr = X
Status Register Data
Check SR.7
1 = WSM Ready
0 = WSM Busy
SR.3 =
FULL STATUS CHECK PROCEDURE
Read Status Register
Data (See Above)
V
PP
Range Error
1
0
SR.1 =
Device Protect Error
1
0
BUS
OPERATION
COMMAND
COMMENTS
Standby
Standby
Check SR.1
1 = Device Protect Detect
WP# = V
IL
Check SR.5
1 = Clear Block Lock-Bits Error
SR.5, SR.4, SR.3 and SR.1 are only cleared by the Clear
Status Register command.
If error is detected, clear the status register before attempting
retry or other error recovery.
Clear Block
Lock-Bits
SR.4, 5 =
Command Sequence
Error
1
0
SR.5 =
Clear Block Lock-Bits
Error
1
0
Standby
Check SR.3
1 = V
PP
Error Detect
Standby
Check SR.4, 5
Both 1 = Command Sequence Error
Fig. 11 Clear Block Lock-Bits Flowchart
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