deveopment
Tentative Specifications REV.E1
Reset
Specifications in this manual are tentative and subject to change.
Mitsubishi microcomputers
M30100/M30102 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
14
x : Nothing is mapped to this bit
: Undefined
The content of other registers and RAM is undefined when the microcomputer
is reset. The initial values must therefore be set.
(1)
(0004
16
)···
Processor mode register 0
(2)
(0005
16
)···
Processor mode register 1
(3)
(0006
16
)···
System clock control register 0
(4)
(0007
16
)···
System clock control register 1
(5)
(6)
(0009
16
)···
Address match interrupt
enable register
(7)
(000A
16
)···
(9)
(11)
(12)
(13)
(21)
(20)
(8)
Protect register
(10)
(14)
(15)
(16)
(17)
(18)
(19)
(36)
(37)
(38)
(39)
(40)
(41)
(42)
(43)
(44)
(00A8
16
)···
UART1 transmit/receive control
register 0
UART1 transmit/receive control
register 1
UART transmit/receive control
register 2
(00AD
16
)···
(00B0
16
)···
(00A0
16
)···
UART0 transmit/receive mode
register
UART0 transmit/receive control
register 0
UART0 transmit/receive control
register 1
UART1 transmit/receive mode
register
(00A4
16
)···
(00A5
16
)···
0 1 0 0 1 0 0 0
0 0
0
0 0
0
0
0
0
1
0 0 0
0
0
0
0
0
0
0 0 0 1 0 0 0
0
0 0 1 0
0 0 0 1 0 0 0
0
0 0 1 0
00
16
00
16
(00AC
16
)···
(51)
(52)
(49)
(50)
(48)
(53)
(54)
(55)
(56)
(62)
(60)
(61)
(58)
(59)
(57)
(67)
(66)
(68)
(69)
(65)
(00D4
16
)···
A-D control register 2
(00D6
16
)···
A-D control register 0
(00D7
16
)···
A-D control register 1
(63)
(64)
(00E2
16
)···
Port P0 direction register
(00E3
16
)···
Port P1 direction register
(00E6
16
)···
Port P2 direction register
(00E7
16
)···
Port P3 direction register
(00EA
16
)···
Port P4 direction register
(00FC
16
)···
Pull-up control register 0
(00FD
16
)···
Pull-up control register 1
(00FE
16
)···
Port P1 drive capacity control
register
Frame base register (FB)
Address registers (A0/A1)
Interrupt table register (INTB)
User stack pointer (USP)
Interrupt stack pointer (ISP)
Static base register (SB)
Flag register (FLG)
Data registers (R0/R1/R2/R3)
0 0 0 0 0
00
16
00
16
00
16
00
16
0000
16
0000
16
0000
16
00000
16
0000
16
0000
16
0000
16
0000
16
0
0
0
0
(46)
(47)
(45)
UART0 transmit interrupt control
register
UART0 receive interrupt control
register
UART1 transmit interrupt control
register
UART1 receive interrupt control
register
Watchdog timer control register
Key input interrupt control register
Address match interrupt
register 0
A-D conversion interrupt
control register
Timer 1 interrupt control register
Timer X interrupt control register
Timer Y interrupt control register
Timer Z interrupt control register
TCIN interrupt control register
(23)
Timer C interrupt control register
(24)
INT3 interrupt control register
INT1 interrupt control register
Timer Y secondary
Timer Y primary
(32)
Timer Y, Z waveform output
control register
Prescaler Z
Timer Z secondary
Prescaler Y
INT2 interrupt control register
Timer Y, Z mode register
Address match interrupt
register 1
(000F
16
)···
(0014
16
)···
(0015
16
)···
(0016
16
)···
(004D
16
)···
(0010
16
)···
(0011
16
)···
(0012
16
)···
(004E
16
)···
(0051
16
)···
(0052
16
)···
(0053
16
)···
(0054
16
)···
(0055
16
)···
(0056
16
)···
(0057
16
)···
(0058
16
)···
(005A
16
)···
(005B
16
)···
(005C
16
)···
(005E
16
)···
(0082
16
)···
(0083
16
)···
(0084
16
)···
(0085
16
)···
(0086
16
)···
(0081
16
)···
(005F
16
)···
(0080
16
)···
0 0 0
0
FF
16
00
16
FF
16
FF
16
Timer Z primary
(0087
16
)···
FF
16
00
16
00
16
0 0
0
0
00
16
00
16
0 0 0
0 0 0
0 0 0
0 0 0
0 0 0
0 0 0
0 0 0
0 0 0
0 0 0
0 0 0
0 0 0
0 0 0
0 0 0
0 0
0 0 0
0 0
0
0
Oscillation stop detection register
(000C
16
)···
0
0 0
0
1
0
0
0
(001E
16
)···
0
INT0 input filter select register
INT0 interrupt control register
(26)
(005D
16
)···
0 0
0 0 0
0 0
0 0 0
0
0 0 0 0 0
FF
16
FF
16
(22)
(25)
(27)
(28)
(29)
(30)
(31)
(33)
(34)
(35)
(71)
(70)
0 0
00
16
00
16
(008A
16
)···
Timer Y,Z output control register
(008B
16
)···
Timer X mode register
0
0 0 0
0 0
Prescaler X
Timer X
(008C
16
)···
(008D
16
)···
FF
16
FF
16
Timer count source set register
(008E
16
)···
(0096
16
)···
External input enable register
(0098
16
)···
Key input enable register
(009A
16
)···
Timer C control register 0
0
0
0
0
0
0
0
Clock prescaler reset flag
(008F
16
)···0
(009B
16
)···
Timer C control register 1
1
1
(72)
0
0
0
0
0
0
0
0
0
0 0
CNTR0 interrupt control register
(0059
16
)···
0 0 0
0
00
16
00
16
00
16
0
0
0
0
0
0
0
(73)
(00DC
16
)···
D-A control register
0
0
0 0
Figure 1.5.4. Device's internal status after a reset is cleared