參數(shù)資料
型號(hào)： M30100
廠商： Renesas Technology Corp.
英文描述： SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
中文描述： 單片16位CMOS微機(jī)
文件頁數(shù)： 158/164頁
文件大?。?/td> 3302K
代理商： M30100
REVISION HISTORY
M30100/M30102 GROUP DATA SHEET
Rev.
Date
Description
Page
Summary
157
Figure 1.10.1 is partly revised.
Explanation of “INT interrupt” is partly revised.
Note 3 is added to Table 1.16.1.
Figure 1.16.2 is partly revised.
Figure 1.16. 3 is partly revised.
Table 1.16.2 is partly revised.
Table 1.16.3 is partly revised.
Figure 1.16.5 is partly revised.
32
51
89
91
92
93
94
94
Features are partly revised.
Page numbers of Table of Contents are partly revised.
Figure 1.1.1 to 1.1.4 are partly revised.
Table 1.1.1 is partly revised
Explanation of (3) package if partly revised.
Figure 1.1.7 is partly revised.
Pin description is partly revised.
Figure 1.3.1 is partly revised.
Explanation of reset is partly revised.
Figure 1.5.3 is partly revised.
Figure 1.5.4 is partly revised.
Figure 1.6.2 is partly revised.
Figure 1.8.1 is partly revised.
Explanation is partly revised.
Figure 1.8.3 is partly revised.
Explanation of (1)main clock, (3)BCLK and (7)f
RING
are partly revised.
Note (2) and (5) of register CM1 in Figure 1.8.4 are partly revised.
Register CM2 in Figure 1.8.5 is partly revised.
Explanation of stop mode is partly revised.
Explanation of “status transition of BCLK”, (3)division by 8 mode, (5)no-division
mode and (8)ring oscillation mode are partly revised.
Note is added.
Explanation of power control is partly revised.
Figure 1.9.2 is partly revised.
Explanation of oscillation stop detection function is partly revised.
Table 1.10.1 is partly revised.
Figure 1.10.1 and 1.10.2 are partly revised.
Explanation of CM20 to CM22 are partly revised.
Explanation of protection is partly revised.
Explanation of “UART1 receive interrupt” of (1)special interrupts is partly revised.
Explanation of “INT0 to INT3 interrupt” of (2)peripheral I/O interrupts is partly revised.
Table 1.12.2 is partly revised.
Program examples are partly revised.
Explanation of INT interrupt is partly revised.
Figure 1.12.10 is partly revised.
Figure 1.12.11 is partly revised.
Explanation of key input interrupt is partly revised.
Figure 1.12.13 and 1.12.14 is partly revised.
Explanation of (1)reading address 00000
16
is partly revised.
“Latch” used for reload register related are changed to “reload register.”
Expression of counter content is changed from “00h” to “00
16
.”
01
01
02 - 05
08
09
09
10
11
15
15
16
19
21
22
22
23
24
25
26
27
27
29
31
32
32
33
34
36
39
39
41
45
52
52
53
54
54
56
59 - 72
59 - 72
C1
11/20/01
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