參數(shù)資料
型號(hào): M30100
廠商: Renesas Technology Corp.
英文描述: SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
中文描述: 單片16位CMOS微機(jī)
文件頁數(shù): 21/164頁
文件大?。?/td> 3302K
代理商: M30100
deveopment
Tentative Specifications REV.E1
Clock Generating Circuit
Specifications in this manual are tentative and subject to change.
Mitsubishi microcomputers
M30100/M30102 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
20
Sub clock
CM0i : Bit i at address 0006
16
CM1i : Bit i at address 0007
16
CM2i : Bit i at address 000C
16
WDCi : Bit i at address 000F
16
CM10 “1”
Write signal
WAIT instruction
Main clock
Interrupt request
level judgment output
RESET
Software reset
Details of divider
CM04
f
C32
X
CIN
1/32
X
COUT
Q
S
R
X
OUT
CM05
f
C
X
IN
R
Q
S
1/2
1/2
1/2
1/2
CM06=0
CM17,CM16=00
CM06=0
CM17,CM16=01
CM06=0
CM17,CM16=10
CM06=1
CM06=0
CM17,CM16=11
d
a
b
1/2
c
Main
clock
switching
circuit
f
RING
Ring
oscillator
oscillation
circuit
CM20
Oscillation
stop detection
CM22
f
1
f
C
CM07
=
0
f
AD
a
d
f
8
f
32
c
b
BCLK
CM07
=
1
R
CM02
1/2
Divider
f
MAIN
Microcomputer
(Built-in feedback resistor)
X
CIN
X
COUT
Open
Externally derived clock
Vcc
Vss
Microcomputer
(Built-in feedback resistor)
X
CIN
X
COUT
(Note)
R
Cd
C
CIN
C
COUT
Note: Insert a damping resistor if
required. The resistance will
vary depending on the oscillator
and the oscillation drive
capacity setting. Use the value
recommended by the maker of
the oscillator.
When the oscillation drive
capacity is set to low, check that
oscillation is stable.
A ring oscillator is built into the microcomputer. The oscillation of the ring oscillator can be used as the
BCLK by setting the main clock select bit (bit 2 of address 000C). Lower power consumption can be
realized because the oscillating frequency of the ring oscillator is much lower compared to that of X
IN
. The
frequency of the ring oscillator depends on the supply voltage and the operation temperature range. Be
careful that variable frequencies and obtain the sufficient margin when designing application products.
Clock Control
Figure 1.8.3 shows the block diagram of the clock generating circuit.
Figure 1.8.2. Examples of sub-clock
Figure 1.8.3. Clock generating circuit
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