參數(shù)資料
型號(hào)： M30100
廠商： Renesas Technology Corp.
英文描述： SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
中文描述： 單片16位CMOS微機(jī)
文件頁數(shù)： 57/164頁
文件大?。?/td> 3302K
代理商： M30100
deveopment
Tentative Specifications REV.E1
Interrupts
Specifications in this manual are tentative and subject to change.
Mitsubishi microcomputers
M30100/M30102 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
56
Set the interrupt priority level to level 0
(Disable
INTi
interrupt)
Set the polarity select bit
Clear the interrupt request bit to “0”
Set the interrupt priority level to level 1 to 7
(Enable the accepting of INTi interrupt request)
Clear the interrupt enable flag to “0”
(Disable interrupt)
Set the interrupt enable flag to “1”
(Enable interrupt)
Precautions for Interrupts
(1) Reading address 00000
16
When maskable interrupt is occurred, CPU reads the interrupt information (the interrupt number and
interrupt request level) in the interrupt sequence.
The interrupt request bit of the certain interrupt written in address 00000
16
will then be set to “0”.
Even if the address 00000
16
is read out by software, “0” is set to the enabled highest priority interrupt
source request bit. Therefore, interrupt can be canceled and unexpected interrupt can occur.
Do not read address 00000
16
by software.
(2) Setting the stack pointer
The value of the stack pointer immediately after reset is initialized to 0000
16
. Accepting an interrupt
before setting a value in the stack pointer may become a factor of runaway. Be sure to set a value in the
stack pointer before accepting an interrupt. Concerning the first instruction immediately after reset,
generating any interrupts is prohibited.
(3) External interrupt
Either an “L” level or an “H” level of at least 250 ns width is necessary for the signal input to pins INT0 to
INT3 regardless of the CPU operation clock.
When changing a polarity of pins INT0 to INT3, the interrupt request bit may become "1". Clear the
interrupt request bit after changing the polarity. Figure 1.12.17 shows the switching condition of INT
interrupt request.
(4) Changing interrupt control register
See "Rewrite The Interrupt Control Register".
Figure 1.12.17. Switching condition of INT interrupt request
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