102
7641 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
PRELIMINARY
Notice: This is not a final specification.
change.
Some parametric limits are subject to
Table 25 Summary of M37641F8 (flash memory version)
Item
Power source voltage
Program/Erase V
PP
voltage
Flash memory mode
FLASH MEMORY MODE
The M37641F8FP/HP (flash memory version) has an internal new
DINOR (DIvided bit line NOR) flash memory that can be rewritten
with a single power source when V
CC
is 5 V, and 2 power sources
when V
PP
is 5 V and V
CC
is 3.3 V in the CPU rewrite and standard
serial I/O modes.
For this flash memory, three flash memory modes are available in
which to read, program, and erase: the parallel I/O and standard
serial I/O modes in which the flash memory can be manipulated
using a programmer and the CPU rewrite mode in which the flash
memory can be manipulated by the Central Processing Unit
(CPU).
Summary
Table 25 lists the summary of the M37641F8 (flash memory ver-
sion).
This flash memory version has some blocks on the flash memory
as shown in Figure 88 and each block can be erased. The flash
memory is divided into User ROM area and Boot ROM area.
In addition to the ordinary User ROM area to store the MCU op-
eration control program, the flash memory has a Boot ROM area
that is used to store a program to control rewriting in CPU rewrite
and standard serial I/O modes. This Boot ROM area has had a
standard serial I/O mode control program stored in it when
shipped from the factory. However, the user can write a rewrite
control program in this area that suits the user’s application sys-
tem. This Boot ROM area can be rewritten in only parallel I/O
mode.
Erase block division
User ROM area
Boot ROM area
Program method
Erase method
Program/Erase control method
Number of commands
Number of program/Erase times
ROM code protection
Specifications
Vcc = 3.00 – 3.60 V, 4.15 – 5.25 V (f(X
IN
) = 24 MHz,
φ
= 6 MHz)
V
PP
= 4.50 – 5.25 V (f(X
IN
) = 24 MHz,
φ
= 6 MHz)
3 modes; Flash memory can be manipulated as follows:
Parallel I/O mode: Manipulated using an external programmer
Standard serial I/O mode: Manipulated using an external programmer
CPU rewrite mode: Manipulated by the Central Processing Unit (CPU).
See Figure 88.
1 block (4 Kbytes) (
Note
)
Byte program
Batch erasing/Block erasing
Program/Erase control by software command
6 commands
100 times
Available in parallel I/O mode and standard serial I/O mode
Note
: The Boot ROM area has had a standard serial I/O mode control program stored in it when shipped from the factory. This Boot ROM area can be rewrit-
ten in only parallel I/O mode.