參數(shù)資料
型號(hào)： M37641M8-XXXHP
廠商： Mitsubishi Electric Corporation
英文描述： SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述： 單芯片8位CMOS微機(jī)
文件頁數(shù)： 107/149頁
文件大小： 1997K
代理商： M37641M8-XXXHP
107
7641 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
PRELIMINARY
Notice: This is not a final specification.
change.
Some parametric limits are subject to
Software Commands
Table 26 lists the software commands.
After setting the CPU Rewrite Mode Select Bit to
“
1
”
, write a soft-
ware command to specify an erase or program operation.
Each software command is explained below.
G
Read Array Command (FF
16
)
The read array mode is entered by writing the command code
“
FF
16
”
in the first bus cycle. When an address to be read is input in
one of the bus cycles that follow, the contents of the specified ad-
dress are read out at the data bus (DB
0
to DB
7
).
The read array mode is retained intact until another command is
written.
G
Read Status Register Command (70
16
)
When the command code
“
70
16
”
is written in the first bus cycle,
the contents of the status register are read out at the data bus
(DB
0
to DB
7
) by a read in the second bus cycle.
The status register is explained in the next section.
G
Clear Status Register Command (50
16
)
This command is used to clear the bits SR4 and SR5 of the status
register after they have been set. These bits indicate that opera-
tion has ended in an error. To use this command, write the
command code
“
50
16
”
in the first bus cycle.
G
Program Command (40
16
)
Program operation starts when the command code
“
40
16
”
is writ-
ten in the first bus cycle. Then, if the address and data to program
are written in the 2nd bus cycle, program operation (data program-
ming and verification) will start.
Whether the write operation is completed can be confirmed by
reading the status register or the RY/BY Status Flag. When the
program starts, the read status register mode is entered automati-
cally and the contents of the status register is read at the data bus
(DB
0
to DB
7
). The status register bit 7 (SR7) is set to
“
0
”
at the
Table 26 List of software commands (CPU rewrite mode)
same time the write operation starts and is returned to
“
1
”
upon
completion of the write operation. In this case, the read status reg-
ister mode remains active until the next command is written.
The RY/BY Status Flag is
“
0
”
during write operation and
“
1
”
when
the write operation is completed as is the status register bit 7.
At program end, program results can be checked by reading the
status register.
Fig. 91 Program flowchart
Command
P
r
r
o
g
r
a
m
C
l
e
a
r
s
t
a
t
u
s
r
e
g
i
s
t
e
r
R
e
e
a
d
a
r
r
a
y
R
a
d
s
t
a
t
u
s
r
e
g
i
s
t
e
r
X
X
X
F
i
r
s
t
b
u
s
c
y
c
l
e
Data
Second bus cycle
d
d
r
e
s
F
F
1
6
7
5
0
1
0
1
6
6
4
0
1
6
Write
Write
Write
Write
X
S
R
D
Read
W
r
i
t
e
E
a
s
e
a
l
l
b
l
o
c
k
s
2
0
1
6
Write
X
20
16
W
r
i
t
e
(Note 1)
WA
(Note 2)
WD
(Note 2)
Block erase
o
t
e
s
2
0
1
6
Write
D0
16
W
r
i
t
e
B
A
(Note 3)
Mode
Address
Mode
A
s
Data
B
0
t
(D
o
D
B
7
)
(
D
B
0
t
o
D
B
7
)
(Note 4)
N
1
2:
WA = Write Address, WD = Write Data
3:
BA = Block Address to be erased (Input the maximum address of each block.)
4:
X denotes a given address in the User ROM area .
:
SRD = Status Register Data
C
y
c
l
e
n
u
m
b
e
r
1
2
1
2
2
2
X
X
X
S
t
a
r
t
W
r
i
t
e
4
0
1
6
S
t
a
t
u
s
e
r
a
e
d
g
i
s
t
e
r
r
Program
completed
NO
Y
E
S
W
W
r
r
i
i
t
t
e
e
a
d
d
a
d
t
a
r
e
s
s
SR4 = 0
Program
error
NO
YES
SR7 = 1
or
RY/BY = 1
W
r
i
t
e
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