參數(shù)資料
型號: M37920FCCHP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP100
封裝: 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100
文件頁數(shù): 158/158頁
文件大?。?/td> 1261K
代理商: M37920FCCHP
99
M37920FCCGP, M37920FCCHP
M37920FGCGP, M37920FGCHP
PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION
MITSUBISHI MICROCOMPUTERS
Fig. 98 Real-time output structure in pulse mode 0
(2) Pulse mode 1
When the pulse output mode select bit is set to “1”, the microcom-
puter enters pulse mode 1, and a pulse output port pins are sepa-
rately controlled (6 bits and 2 bits).
Figure 99 shows the real-time output structure in pulse mode 1.
When the waveform output select bits are set to “01” (bit 1 = “0” and
bit 0 = “1”), RTP13 to RTP10, RTP03, and RTP02 become program-
mable I/O port pins. Simultaneously, RTP01 and RTP00 become
pulse output port pins.
When the waveform output select bits are set to “10” (bit 1 = “1” and
bit 0 = “0”), RTP13 to RTP10, RTP03, and RTP02 become pulse out-
put port pins. At this time, RTP01 and RTP00 become programmable
I/O port pins.
When the waveform output select bits are set to “11” (bit 1 = bit 0 =
T
DQ
T
DQ
D6
D5
D4
D3
D2
D1
D0
Timer A0
Timer A2
P53/RTP03
P52/RTP02
P51/RTP01
P50/RTP00
Port P5i latch
Waveform output select bit (Address A016)
bit 1
Pulse output data register 0
(Address A216)
Pulse output data register 1
(Address A416)
Data
bus
(Even)
Pulse output mode select bit
(Address A016)
0
D7
T
DQ
T
a
Waveform output select bit (Address A016)
bit 0
P57/RTP13
P56/RTP12
P55/RTP11
P54/RTP10
Port P5i direction register
“1”
“0”
(i = 7 to 0)
a
(Address D16)
(Address B16)
“1”), pulse output port pins are divided into two groups; one consists
of RTP13 to RTP10, RTP03, RTP02 and the other consists of RTP01
and RTP00.
When the waveform output select bits are set to “00” (bit 1 = bit 0 =
“0”), port P5 pins become normal programmable I/O port pins.
RTP13 to RTP10, RTP03, and RTP02 are controlled by timer A2.
Also, RTP01 and RTP00 are controlled by timer A0.
The contents of the pulse output data register 1 (high-order 6 bits at
address A416), which corresponds to RTP13 to RTP10, RTP03, and
RTP02, are output to this port each time when the contents of timer
A2 counter becomes “000016”. The contents of the pulse output data
register 0 (low-order 2 bits at address A216), which corresponds to
RTP01 and RTP00, are output to this port each time when the con-
tents of timer A0 counter become “000016”.
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