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參數(shù)資料
| 型號： | M37920FCCHP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100 |
| 文件頁數(shù)： | 65/158頁 |
| 文件大?。?/td> | 1261K |
| 代理商： | M37920FCCHP |
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Corrections and Supplementary Explanation for M37920FxC Datasheet (REV.A) NO.5
Page
Error
Correction
(5/6)
Page 123,
Right column,
After line 24
request occurrence.
request occurrence. In the CPU reprogramming mode,
be sure not to use the STP and WIT instructions.
Page 124,
Fig. 121
The CPU reprogramming mode select bit is set to “1”.
(Writing of “0”
→ Writing of “1”)
Writing of “1” to the CPU reprogramming mode select
bit.
(Writing of “0”
→ Writing of “1”)
Page 124,
Software
Commands
(D8–D15) is ignored.
(Lines 6, 7)
(D8–D15) is ignored. (Except for the write data at
the 2nd cycle of a page programming command.)
(Lines 6, 7)
Page 125,
Page program
Command
, the same way as bit 7 of the status register.
Reading out the
(Lines 4 to 7)
, the same wayas bit 7 of the status register.
Before execution of the next command, be sure to verify
that bit 7 of the status register (SR.7) or the RY/BY
status bit is set to “1” (READY). During the automatic
programming operation, writing of commands and
access to the flash memory must not be performed.
Reading out the
Page 125,
Block Erase
Command
(Lines 20 to 23)
, the same way as bit 7 of the status register.
Reading out the
(Lines 20 to 23)
, the same way as bit 7 of the status register.
Before execution of the next command, be sure to verify
that bit 7 of the status register (SR.7) or the RY/BY
status bit is set to “1” (READY). During the automatic
erase operation, writing of commands and access to the
flash memory must not be performed.
Reading out the
Page 127,
Erase All
Unlocked Block
Command
(Lines 9 to 11)
is also reported by a read of the status register.
When the lock bit
(Lines 9 to 11)
is also reported by a read of the status register.
During the automatic erase execution (when the RY/BY
status bit = “0” ), writing of commands and access to the
flash memory must not be performed.
When the lock bit
(Lines 4 to 7)
Page 124,
Page program
Command
(After line 20)
mode is maintained.
(After line 20)
mode is maintained. In continuous programming,
if there is no programming error, page programming
commands can be executed with the read status register
mode kept.
Page 123,
Left column,
Lines 15 to 19
Therefore, a software command consists of 8-bit units
must be written only to an even address; therefore, any
data written to an odd address will be invalid.
The write state
Therefore, a software command consisting of 8 bits must
be written to an even address; therefore, any command
written to an odd address will be invalid. Since the write
data at the 2nd cycle of a programming command consi-
sts of 16 bits, this data must be written to even and odd
addresses.
The write state
Page 127,
Data Protect
Function
(Block Lock)
(After line 20)
lock bit is terminated.
(After line 20)
lock bit is terminated.
To perform erase or programming, be sure to do one of
the following.
By executing the read lock bit status command, verify
that the lock of the target block is invalid.
Set the lock bit invalidity select bit to “1” to invalidate
the lock.
When the block erase or programming is performed with
the lock valid, the erase status bit (SR.5) and program-
ming status bit (SR.4) are set to “1” (terminated by error).
(Titlle)
Page Program Command (4116)
(Titlle)
Page Programming Command (4116)
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