參數(shù)資料
型號： M37920FCCHP
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP100
封裝： 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100
文件頁數(shù)： 83/158頁
文件大?。?/td> 1261K
代理商： M37920FCCHP
M37920FCCGP, M37920FCCHP
M37920FGCGP, M37920FGCHP
PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION
MITSUBISHI MICROCOMPUTERS
30
Signal
RD
BLW
BHW
ALE
φ1
RDY
HOLD
HDLA
CS0–CS3
BYTE
Table 11. Each bus control signal’s function
I/O
Output
Input
Output
Input
Function
Read signal. Outputs “L” at read from the external area.
Write signal. Outputs “L” at write to the external area.
Address latch enable signal. Outputs “H” level pulse in the
period just before signals RD, BLW, BHW become “L”.
This is used to latch an address in the external.
Internal standard clock’s output. Outputs system clock
(fsys).
Ready signal. The “L” level period of the last
φ1 in the ac-
cess cycle for the external area (in other words, “L” level
period of RD, BLW, BHW) will be extended while “L” level
voltage is applied to this pin.
Hold request signal. Appliance of “L” level voltage will gen-
erate a hold request; appliance of “H” level voltage will re-
quest to terminate the hold state.
Hold acknowledge signal. Outputs “L” in the hold state.
Chip select signal. Outputs “L” in access to the specified
chip select area.
Input signal to select the external data bus width. When
this pin’s level = Vss, 16-bit width will be selected; and
when Vcc, 8-bit width will be selected.
Remarks
For operation differences between BLW and BHW de-
pending on the external data bus width, see Table 5.
In order to latch an address with signal ALE, do as follows:
While ALE = “H”, be sure to open a latch, so the address
will pass it.
While ALE = “L”, be sure to hold the address.
Acceptance and termination of a hold request is performed
at completion of the bus cycle while the BIU operates.
In the hold state, A0–A23, D0–D15, RD, BLW, BHW, ALE,
CS0–CS3 enter the floating state. At termination of the hold
state, simultaneously with the timing when HLDA becomes
“H” level, the above floating state is terminated. Then, bus
access will be restarted 1 cycle of
φ1 after.
In the hold state, also, the CPU operates with access to
the internal area. If the CPU accesses the external area, in
the hold state, the CPU stops its operation.
For details, refer to the section on the chip select wait con-
troller.
When BYTE = Vss level, by the register setting, each chip
select area (CS1 to CS3) can have the 8-bit data bus, inde-
pendently.
For details, refer to the section on the chip select wait con-
troller.
相關(guān)PDF資料
PDF描述
M37920FCCGP 16-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP100
M38039MFL-XXXWG 8-BIT, MROM, 16.8 MHz, MICROCONTROLLER, PBGA64
M38039FFLSP 8-BIT, FLASH, 16.8 MHz, MICROCONTROLLER, PDIP64
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M37920FGCGP 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION
M37920FGCHP 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION
M37920S4CGP 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:16 BIT CMOS MICROCOMPUTER
M37P75C4P3 功能描述:汽車連接器 Pin Contact RoHS:否 制造商:Amphenol SINE Systems 產(chǎn)品:Contacts 系列:ATP 位置數(shù)量: 型式:Female 安裝風格: 端接類型: 觸點電鍍:Nickel
M37S07K4F3 功能描述:汽車連接器 Sckt Contact RoHS:否 制造商:Amphenol SINE Systems 產(chǎn)品:Contacts 系列:ATP 位置數(shù)量: 型式:Female 安裝風格: 端接類型: 觸點電鍍:Nickel
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