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參數(shù)資料
| 型號： | MB86965A |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 2 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP16 |
| 封裝： | PLASTIC, QFP-160 |
| 文件頁數(shù)： | 10/76頁 |
| 文件大?。?/td> | 394K |
| 代理商： | MB86965A |
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MB86965
18
I/O Base Address Configuration
After successful system powerup, the software utility
reads and compares the Product Signature or powerup
values of the first eight registers to see if the controller is
set with a nonconflicting I/O base address. Product
Signature is the initial value of the first eight
EtherCoupler registers.
The I/O base address is determined by bits 2–0 of the
configuration byte read from EEPROM into the shift
register/counter at the time of powerup. After reading
from the EEPROM, hardware logic sets the shift
register/counter to counter mode, and assigns a Counter
Enable (Counter/Shift Register Select) bit within
EtherCoupler
registers to monitor the register and
counter modes of this special three-bit block.
Table 4 also shows how BMPR19<2:0> defines the I/O
Base Address read from the EEPROM. If the Product
Signature read does match expected values, there is no
conflict in the I/O address range. If there is a conflict in
setting the address, the system may ignore the existence
of EtherCoupler, although the software utility should
continue reading the 0X12 register. Because the cell is set
for counter mode (I/O Base Unlock bit, BMPR13<7>),
every time the register is read, bits 2, 1 and 0 increment by
one, moving the I/O base address to the next setting. The
utility should read the chip for the correct Product
Signature each time the register/counter counts up to the
next base I/O address. This mechanism allows an adapter
board to dynamically reconfigure itself to a nonconflict-
ing I/O base address.
Once the right address is achieved, software locks the
register/counter cell to
register Address mode by
resetting the designated Counter Enable
bit. The
software utility then reads the new configuration from
the 0X13 register, and reprograms the EEPROM
configuration byte with correct base addresses.
Interrupt Definition
Additionally, Table 4 indicates how BMPR19<7:6>
defines the interrupt read from the EEPROM. Bits 6 and
7, which are used to configure interrupts, can be
programmed to select any one of four interrupt lines
offered at the system interface side of the EtherCoupler.
The user may connect these lines to any four available
system interrupt lines. The software utility tests the
interrupt configuration for conflict and, if conflicting,
reprograms the EEPROM bits with the next available
interrupt option, and reboots the system to try again.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MB86965B | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:EtherCoupler ETHERNET CONTROLLER WITH 10BASE?T TRANSCEIVER |
| MB86965BPF-G-BND | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:EtherCoupler ETHERNET CONTROLLER WITH 10BASE?T TRANSCEIVER |
| MB86967 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:LAN Controller with PC Card, ISA Bus, and General-purpose Bus Interfaces |
| MB86967PFV | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:LAN Controller with PC Card, ISA Bus, and General-purpose Bus Interfaces |
| MB86977 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:IP PACKET FORWARDING ENGINE |
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