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參數(shù)資料
| 型號： | MB86965A |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 2 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP16 |
| 封裝： | PLASTIC, QFP-160 |
| 文件頁數(shù)： | 19/76頁 |
| 文件大小： | 394K |
| 代理商： | MB86965A |
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MB86965
26
Table 16. Network Error Monitoring Modes
ACPT BAD
PKTS
DLCR5<5>
ACPT SHORT
PKTS
DLCR5<3>
INT EN SHORT
PKT ERR
DLCR3<3>
INT EN ALIGN
ERR DLCR3<2>
INT EN
CRC ERR
DLCR3<1>
Mode
0
Normal, nominator mode.
0
X
Error interrupts only, if enabled.
0
1
0
X
Save short packets if otherwise
error-free in buffer. Interrupts only
for alignment and CRC errors, if
enabled. RX PKT bit DLCR1<7>
set high if short packet received.
1
0
Save packets with short,
alignment or CRC errors in buffer.
RX PKT bit DLCR1<7> set high if
packet with error received.
All others
Not used.
Transmit Mode Register
Table 17. DLCR4 — Transmit Mode Register
BIT
SYMBOL
TYPE
DESCRIPTION
7
COL CTR 3
R*
COLLISION COUNT 3 ~ 0: Indicate the number of consecutive collisions
t
d b th
t t
it
k t R
d
l
(* I iti l
l
i
t
6
COL CTR 2
R*
encountered by the current transmit packet. Read only. (* Initial value is not
predictable until first packet transmits.)
5
COL CTR 1
R*
redictable until first acket transmits.)
4
COL CTR 0
R*
3
0
N0
RESERVED. Write 0.
2
DREQ
EXTND
RW1
DMA REQUEST EXTEND: When high, extends DMA Request until last transfer
cycle.
CNTRL
RW0
CONTROL OUTPUT: When low, the complement to this bit is for general use as
the CNTRL signal, available on EtherCoupler pin 64. When low, DMA Request
extends until next-to-last transfer cycle.
1
LBC
RW1
LOOPBACK CONTROL: This bit controls encoder/decoder loopback function. A
zero on this bit places EtherCoupler in internal loopback mode.
0
EN TX
DEFER
RW0
ENABLE TRANSMIT DEFER: Program this bit low for normal network operation.
When high, the transmitter will not defer to traffic on the network, and will ignore the
collision indications.
Table 16 shows details on Network Error Monitoring
modes.
As shown in Table 17, this register contains two control
bits associated with transmission, a general-purpose
control bit that drives an EtherCoupler pin, and extends
the DMA request, and a collision counter.
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