參數(shù)資料
型號(hào)： MB86965A
元件分類： 微控制器/微處理器
英文描述： 2 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP16
封裝： PLASTIC, QFP-160
文件頁(yè)數(shù)： 8/76頁(yè)
文件大?。?/td> 394K
代理商： MB86965A
MB86965
16
Table 1. BMPR16 — EPROM Control Register
BIT
SYMBOL
TYPE
DESCRIPTION
7
0
9
RESERVED: Write 0
6
ESK
W
EEPROM SHIFT CLOCK: Generates a shift clock signal for the EEPROM,
by writing 1 or 0 from the software program. Write only.
5
ECS
W
EEPROM CHIP SELECT: When set to 1, generates a chip select signal for
the EEPROM. Write only.
4-0
0
RESERVED: Write 0
Table 2. BMPR17 — EEPROM Data Register
BIT
SYMBOL
TYPE
DESCRIPTION
7
EDIO
W/R
EEPROM INPUT/OUTPUT CLOCK: When set to 1, indicates data is being
input to the EEPROM. When set to 0, indicates that data is being output from
the EEPROM
6-0
0
RESERVED: Write 0
Table 3. BMPR18 — I/O Base Address Register
BIT
SYMBOL
TYPE
DESCRIPTION
7-0
IOBA<7:0>
R
I/O BASE ADDRESS: When in Jumperless mode, enables storage and
incrementing if I/O base address. Read only.
7-0
X12SEL
R
ADDRESS 12 SELECT: When set to high in Jumpered mode, enables
reading of jumpered information (address 0X12) from the board.
Register BMPR16 controls the selection and operation
of the EEPROM and operates in Jumperless mode only.
Register BMPR17 controls the input or output of the
EEPROM and operates in Jumperless mode only.
Register BMPR18 temporarily stores, increments and
reads out the I/O base address in Jumperless mode, when
in Mode 3 operation with an EEPROM, and generates the
X12SEL signal in Jumpered mode to enable reading of
jumpered information from the board.
Register BMPR18 temporarily stores, increments and
reads out the I/O base address in Jumperless mode, when
in Mode 3 operation with an EEPROM, and generates the
X12SEL signal in Jumpered mode to enable reading of
jumpered information from the board.
Register BMPR19 reads the EtherCoupler jumperless
configuration data in Jumperless mode, and generates the
X13SEL signal in Jumpered mode to enable reading of
jumpered information from the board.
Memory Base Address Configuration
Table 4 shows how BMPR19<5:3> defines the ROM
Address read from the EEPROM. The process of reading
the byte begins at system powerup, and is in parallel with
system BIOS powerup initialization and checkout. This
allows the BIOS to scan the ROM location for a valid
boot ROM. If there are no memory address conflicts, the
boot ROM initialization code then initializes its
resources, replaces the required interrupt vectors, and
returns control to system BIOS to complete system
initialization.
If there are any memory address conflicts, the system
may halt during powerup. If so, EtherCoupler should be
removed from the system and installed in a system with
no memory address conflict. This allows the user to
reprogram the EEPROM with a different memory base
address. An adapter card reprogrammed with a new base
address can then be reinstalled in the original system. In
case of I/O conflicts, EtherCoupler is software-configur-
able. In jumperless mode, removal of EtherCoupler from
the system is unnecessary.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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