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參數(shù)資料
| 型號(hào)： | MB86967PFV |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP100 |
| 封裝： | PLASTIC, LQFP-100 |
| 文件頁數(shù)： | 41/129頁 |
| 文件大小： | 1519K |
| 代理商： | MB86967PFV |
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19
MB86967
4. Register Access
The MB86967 includes four sets of user-accessible registers, all of which are accessible as bytes or words.
Each register set contains eight registers.
Direct access is available to two sets of registers in the device’s register set at a time, via register addresses
00H through 0FH. The Data Link Control Registers set (DLCR0 - DLCR7) is always accessible via addresses
00H to 07H. Access to one of the remaining three sets is accomplished by programming the register bank select
bits, DLCR7<3:2>. This selects the register set accessible via addresses 08H to 0FH. The bank-switched
registers are the Node ID set , DLCR7 - DLCR15, (for setting the Ethernet Address and performing TDR
diagnostics), the Hash Table set, HT8 - HT15, (for setting up multicast address filtering) and the Buffer Memory
Port set, BMPR7 - BMPR15. During operation (excluding initialization or diagnostics), the Buffer Memory Port
set should normally be selected.
Table 1 Byte Ordering
Items shown with an asterisk are in numerically reversed byte order
Data<15:8>
Data<7:0>
FOR TRANSMIT PACKET
LEAST....MOST
Transmit Length, high byte
Transmit Length, low byte
Destination Address, 2nd byte
Destination Address, 1st byte
Source Address, 2nd byte
Source Address, 1st byte
Length Field, low byte*
Length Field, high byte*
Data Field, 2nd byte
Data Field, 1st byte
MOST....LEAST
Transmit Length, low byte*
Transmit Length, high byte*
Destination Addr, 1st byte
Destination Addr, 2nd byte
Source Addr, 1st byte
Source Addr, 2nd byte
Length Field, high byte
Length Field, low byte
Data Field, 1st byte
Data Field, 2nd byte
FOR RECEIVE PACKET
LEAST....MOST
Unused, reserved
Receive Packet Status
Receive Length, high byte
Receive Length, low byte
Destination Address, 2nd byte
Destination Address, 1st byte
Source Address, 2nd byte
Source Address, 1st byte
Length Field, low byte*
Length Field, high byte*
Data Field, 2nd byte
Data Field, 1st byte
MOST....LEAST
Receive Packet Status
Unused; reserved
Receive Length, low byte*
Receive Length, high byte*
Destination Addr, 1st byte
Destination Addr, 2nd byte
Source Addr, 1st byte
Source Addr, 2nd byte
Length Field, high byte
Length Field, low byte
Data Field, 1st byte
Data Field, 2nd byte
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MB86977 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:IP PACKET FORWARDING ENGINE |
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| MB86A21PMC-G-BNDE1 | 制造商:FUJITSU 功能描述: |
| MB86A21PMC-G-JNE1 | 制造商:FUJITSU 功能描述: |
| MB86A22PMC-ES-BNDE1 | 制造商:FUJITSU 功能描述: |
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