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參數(shù)資料
| 型號(hào)： | MB86967PFV |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP100 |
| 封裝： | PLASTIC, LQFP-100 |
| 文件頁(yè)數(shù)： | 82/129頁(yè) |
| 文件大?。?/td> | 1519K |
| 代理商： | MB86967PFV |
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MB86967
1.2 Setting I/O Base Addresses
After completing jumperless initialization, read 8 bytes (DLCR0 to DLCR7) of the registers in the LAN controller
using the system software and check that the initial values in these registers have been read correctly. If they
are not read correctly, the I/O addresses are assumed to overlap other I/O addresses, and must be changed.
To make a change, read BMPR18 (the read value is meaningless). Each time BMPR18 is read, the values of
IOSEL2 to IOSEL0 are incremented from 000 to 111 and the updated values become valid in BMPR19.
When the I/O addresses are updated until the values of DLCR0 to DLCR7 can be read properly, the LAN controller
is located at the correct I/O addresses. After the I/O addresses have been defined, to prevent them being updated
in error when BMPR18 is read, clear bit 7 (I/O BASE UNLOCK) of BMPR13.
When the I/O address values found by the above operation are prewritten to E2PROM, the above operation is
not needed at the next system startup, which reduces the system startup overhead. Consequently, the above
retrieval of I/O addresses is required only when the LAN interface board is first installed in a personal computer.
1.3 Setting Interrupt Signals
The LAN controller has four interrupt output pins. The interrupt output pin from which interrupt signals should
be output can be specified by initialization data in E2PROM. If contention occurs between the interrupt signals
and other I/O devices, the address decoder cannot be updated like the I/O addresses. Write another address
decode value to E2PROM and then restart the system. Repeat the above process until interrupt signals are
allocated to the correct address area.
1.4 Restarting System
To restart the system, perform a hardware reset or a write operation to the reset registers RESET0 to RESET7
(any data can be written to any of RESET0 to RESET7). The write operation provides the same condition as
the hardware reset except that BMPR16 and BMPR17 are not initialized.
Initialization takes about 50
s after canceling a hardware reset, or completing a write operation at the reset
registers.
2. Jumper + E2PROM ISA Mode
This mode is the jumperless ISA mode without automatic initialization function. The I/O addresses are set by
external pins. The interrupt output pin is fixed at IRQ0. The E2PROM interface functions only to store node ID.
Read and write operations from and to E2PROM are performed by the system software. After converting read
serial data to parallel data, write the data to the node ID registers (DLCR8 to DLCR15).
3. Performance Comparison between Jumperless ISA Mode and Jumper + E2PROM ISA Mode
Jumperless ISA Mode
Jumper + E2PROM ISA
Mode
Automatic initialization
×
E2PROM interface
(Required)
(Option)
Interrupt output selection
×
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MB86977 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:IP PACKET FORWARDING ENGINE |
| MB86977PFV-G-BND | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:IP PACKET FORWARDING ENGINE |
| MB86A21PMC-G-BNDE1 | 制造商:FUJITSU 功能描述: |
| MB86A21PMC-G-JNE1 | 制造商:FUJITSU 功能描述: |
| MB86A22PMC-ES-BNDE1 | 制造商:FUJITSU 功能描述: |
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