
47
MB86967
(Continued)
(9) DLCR8 to DLCR13: Node ID Registers
DLCR8 to DLCR13 store the node ID of the self office. After comparing the destination addresses in the receive
packet with the values of the node ID registers, the matching packets are received according to the setting
conditions of the Address Match Mode bits of DLCR5.
Usually, set bit 0 (ID 0) of DLCR8 to 0 (When bit 0 of the destination address is 1, the received data serve as
the multicast address and the packet is received according to the setting conditions of the Address Match Mode
bits of DLCR5, irrespective of their values).
The initial values of the node ID registers are undefined. Reading and writing are possible only when bit 7 (ENA
DLC) of DLCR6 is 1.
Bit no.
Bit name
Operation
Value
Function
3 and 2 RBS1
RBS0
Read/Write
—
The MB86967 has three internal register sets. Bank switching
by these bits allows the system to access each register set.
DLCR0 to DLCR7 can always be accessed irrespective of the
conditions of register banks.
1EOP/EOP
Read/Write
0
Sets DMA end signal (EOP) input
pin Active Low
* : This bit is invalid in the
PCMCIA mode.
1
Sets DMA end signal (EOP) input
pin Active High
0
BYTE SWAP
Read/Write
0
When the system bus is the 16-bit
mode, byte swapping is not
performed for access to BMPR8.
The bus is an Intel 16-bit bus.
* : Writing 1 to this bit is
prohibited in the PC
card mode. Always
write 0 to this bit.
1
When the system bus is the 16-bit
mode, byte swapping is performed
for access to BMPR8, switching
between upper and lower data. The
bus is a Motorola 16-bit bus.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
DLCR8
ID7
ID6
ID5
ID4
ID3
ID2
ID1
ID0
DLCR9
ID15
ID14
ID13
ID12
ID11
ID10
ID9
ID8
DLCR10
ID23
ID22
ID21
ID20
ID19
ID18
ID17
ID16
DLCR11
ID31
ID30
ID29
ID28
ID27
ID26
ID25
ID24
DLCR12
ID39
ID38
ID37
ID36
ID35
ID34
ID33
ID32
DLCR13
ID47
ID46
ID45
ID44
ID43
ID42
ID41
ID40
RBS1 RBS2 Address 00H to 07H Address 08H to 0FH
0
DLCR0 to DLCR7
DLCR8 to DLCR15
0
1
DLCR0 to DLCR7
MAR8 to MAR15
1
0
DLCR0 to DLCR7
BMPR8 to BMPR15
1
DLCR0 to DLCR7
Reserved