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參數(shù)資料
| 型號(hào)： | MB86967PFV |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP100 |
| 封裝： | PLASTIC, LQFP-100 |
| 文件頁(yè)數(shù)： | 63/129頁(yè) |
| 文件大?。?/td> | 1519K |
| 代理商： | MB86967PFV |
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MB86967
(Continued)
* : The bit 3 to bit 0 are cleared when the new packet is received.
Bit no.
Bit name
Operation
Value
Function
4RMT RST
(Remote Reset)
Read
0
The received packet is not a remote reset packet.
1
Indicates value of data length field in received packet is
0900H.
This bit is set only when the ENA RMT RST bit of DLCR5 is
set and a physical address match occurs; it is not set for the
multicast address and broadcast address. It is also not set
when the ENA SRT PKT bit of DLCR5 is set.
Write
0
Not affected
1
This bit is cleared. It is also cleared automatically at the start
of receiving the next packet.
3
RX SRT PKT
(Short Packet)
Read*
0
No short packet error
1
Indicates data length (address + data length + data) of
received packet not more than minimum data length
(60 bytes).
This bit is set for not more than 6 bytes when the ENA SRT
PKT bit of DLCR5 is set. It is not set when a collision occurs
at the self-TXPKT.
Write
0
Not affected
1
This bit is cleared.
2ALG ERR
(Alignment
Error)
Read*
0
No alignment error
1
Indicates CRC of received packet incorrect and bit count of
received data not multiple of 8
Write
0
Not affected
1
This bit is cleared.
1CRC ERR
(CRC Error)
Read*
0
No CRC error
1
Indicates CRC of received packet incorrect.
This bit is not set when a collision occurs at the self-TXPKT.
Write
0
Not affected
1
This bit is cleared.
0OVRFLO
(Overflow Error)
Read*
0
No overflow error
1
Indicates that data erased because data length of received
packet larger than free capacity of receiver buffer memory.
Even when this bit is set, data is received normally when the
data length of the next packet is smaller than the free capacity
of the receiver buffer memory. This bit is set to indicate that
the receiver buffer memory is almost full; transfer data
immediately from the buffer to the host system. This bit is not
set in the loopback mode.
Write
0
Not affected
1
This bit is cleared.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MB86977 | 制造商:FUJITSU 制造商全稱(chēng):Fujitsu Component Limited. 功能描述:IP PACKET FORWARDING ENGINE |
| MB86977PFV-G-BND | 制造商:FUJITSU 制造商全稱(chēng):Fujitsu Component Limited. 功能描述:IP PACKET FORWARDING ENGINE |
| MB86A21PMC-G-BNDE1 | 制造商:FUJITSU 功能描述: |
| MB86A21PMC-G-JNE1 | 制造商:FUJITSU 功能描述: |
| MB86A22PMC-ES-BNDE1 | 制造商:FUJITSU 功能描述: |
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