參數(shù)資料
型號: MC68HC05C0FN
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, 4 MHz, MICROCONTROLLER, PQCC44
封裝: PLASTIC, LCC-44
文件頁數(shù): 15/96頁
文件大小: 357K
代理商: MC68HC05C0FN
Section 3: CPU Core
MOTOROLA
Page 13
MC68HC05C0 Specification Rev. 1.2
SECTION 3
CPU CORE
3.1
REGISTERS
The MCU contains five registers as shown in the programming model of Figure 3-1 :
Programming Model. The interrupt stacking order is shown in Figure 3-2 : Stacking
Figure 3-1: Programming Model
Figure 3-2: Stacking Order
A
70
X
70
HI
N
Z
C
CCR
11
SP
70
PC
15
0
Accumulator
Index Register
Program Counter
Stack Pointer
Condition Code Register
0
15
0
Index Register
PCL
Accumulator
Condition Code Register
PCH
11
1
70
Stack
I
N
T
E
R
U
P
T
Decreasing
Unstack
R
E
T
U
R
N
Increasing
Since the Stack Pointer decrements during pushes, the PCL
is stacked first, followed by PCH, etc. Pulling from the stack
is in the reverse order.
Memory
Addresses
Memory
Addresses
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