參數(shù)資料
型號(hào)： MC68HC05C0FN
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, 4 MHz, MICROCONTROLLER, PQCC44
封裝： PLASTIC, LCC-44
文件頁數(shù)： 61/96頁
文件大小： 357K
代理商： MC68HC05C0FN
Section 11: 16-Bit Timer
MOTOROLA
Page 55
MC68HC05C0 Specification Rev. 1.2
Figure 11-2: Timer Counter MSB Register
Figure 11-3: Timer Counter LSB Register
Figure 11-4: Timer Alternate Counter MSB Register
Figure 11-5: Timer Alternate Counter LSB Register
11.3
OUTPUT COMPARE REGISTER
The 16-bit output compare register is made up of two 8-bit registers at locations $0E (MSB)
and $0F (LSB). The output compare register is used for several purposes, such as
indicating when a period of time has elapsed. All bits are readable and writable and are not
altered by the timer hardware or reset. If the compare function is not needed, the two bytes
of the output compare register can be used as storage locations.
The output compare register contents are continually compared with the contents of the
free-running counter, and if a match is found, the output compare flag (OCF) bit is set and
the output level (OLVL) bit is clocked to an output level register. The output compare
register values and the output level bit should be changed after each successful
76543210
RD
WR
1
RST
MSB
1
CNTR
1
CNT15
CNT14
CNT13
CNT12
CNT11
CNT10
CNT9
CNT8
$10
76543210
RD
WR
0
1
RST
CNTR
LSB
0
11
1
CNT0
CNT1
CNT2
CNT3
CNT4
CNT5
CNT6
CNT7
$11
76543210
RD
WR
1
RST
MSB
1
ACNTR
1
CNT15
CNT14
CNT13
CNT12
CNT11
CNT10
CNT9
CNT8
$12
76543210
RD
WR
0
1
RST
LSB
0
ACNTR
1
CNT7
CNT6
CNT5
CNT4
CNT3
CNT2
CNT1
CNT0
$13
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