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參數(shù)資料
| 型號： | MC68HC05C0FN |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, 4 MHz, MICROCONTROLLER, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁數(shù)： | 23/96頁 |
| 文件大?。?/td> | 357K |
| 代理商： | MC68HC05C0FN |
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MOTOROLA
Page iv
MC68HC05C0 Specification Rev. 1.2
SECTION 4
INTERRUPTS ................................................................ 19
4.1
HARDWARE CONTROLLED INTERRUPT SEQUENCE........ 20
4.2
SOFTWARE INTERRUPT (SWI) ............................................. 20
4.3
EXTERNAL INTERRUPT......................................................... 20
4.4
16-BIT TIMER INTERRUPT..................................................... 21
4.5
SERIAL COMMUNICATIONS INTERFACE INTERRUPT....... 21
4.6
MULTI-FUNCTION TIMER INTERRUPTS .............................. 21
4.7
KEYBOARD SCAN INTERRUPT............................................. 21
SECTION 5
RESETS ......................................................................... 23
5.1
POWER-ON RESET (POR)..................................................... 23
5.2
COMPUTER OPERATING PROPERLY (COP) RESET.......... 24
5.3
LOW-VOLTAGE RESET.......................................................... 24
5.4
ILLEGAL STOP RESET........................................................... 24
5.5
RESET PIN .............................................................................. 24
SECTION 6
LOW-POWER MODES .................................................. 25
6.1
STOP ....................................................................................... 25
6.1.1
STOP RECOVERY............................................................. 25
6.2
WAIT ........................................................................................ 25
SECTION 7
INPUT/OUTPUT PORTS ............................................... 29
7.1
PORT B.................................................................................... 29
7.2
PORT C.................................................................................... 29
7.3
PORT D.................................................................................... 29
7.4
INPUT/OUTPUT PROGRAMMING.......................................... 30
SECTION 8
SYSTEM CONFIGURATION ......................................... 33
8.1
EXPANDED BUS MODES....................................................... 33
8.1.1
MUXED MODE ................................................................... 33
8.1.2
NON -MUXED MODE......................................................... 33
8.2
CHIP SELECTS ....................................................................... 33
8.2.1
PAGE-0 CHIP SELECT TYPE............................................ 33
8.2.2
GENERAL - PURPOSE CHIP SELECT TYPE................... 34
8.2.3
A15 CHIP SELECT............................................................. 34
8.3
CONFIGURATION REGISTER (CNFGR) ............................... 34
8.3.1
STPEN - SToP ENable....................................................... 34
8.3.2
STREC - STop RECovery .................................................. 34
8.3.3
COPEN - Computer Operating Properly ENable ................ 34
8.3.4
IRV - Internal Read Visibility ............................................... 34
8.3.5
LIRV - Load Instruction Register Visibility........................... 35
8.3.6
LVREN - Low Voltage Reset ENable.................................. 35
8.3.7
CS1P1:CS1P0 - Chip Select 1 Parameters........................ 35
8.4
EXTERNAL INTERRUPT CONTROL/STATUS
REGISTER (EICSR) ................................................................ 35
8.4.1
KSF - Keyboard Scan request Flag .................................... 36
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