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參數(shù)資料
| 型號(hào)： | MC68SC302 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 32-Bit Microprocessor(32位微處理器) |
| 中文描述： | 32位微處理器（32位微處理器） |
| 文件頁(yè)數(shù)： | 56/218頁(yè) |
| 文件大?。?/td> | 521K |
| 代理商： | MC68SC302 |
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Communications Processor (CP)
4-10
MC68SC302 USER’S MANUAL
MOTOROLA
transmit data is being clocked out, then NMSI mode should be used instead of PCM
highway.)
The two sync signals, L1SYNC and PSYNC, are also inputs to the SC302. They select one
of three PCM channels to which data is routed or select no channel (see Table 4-2).
A PCM channel is not an SCC channel. A PCM channel is an intermediate internal channel
that can be routed to any SCC, as selected in the SIMODE register. This extra layer of
indirection keeps the hardware (which must generate L1SYNC and PSYNC signals
externally) from having to be modified if a change in the SCC data routing is required.
The routing of each channel is determined in the SIMODE register by the DRB-DRA bits for
channel 1, the B1RB–B1RA bits for channel 2, and the B2RB–B2RA bits for channel 3. Once
the routing of a PCM channel is selected, data is transmitted from the selected SCC
transmitter over the physical interface using the L1CLK pin. At the same time, data is
received from the physical interface and routed to the selected SCC receiver. When no sync
is asserted, the L1TXD pin is three-stated, and the L1RXD pin is ignored.
Two different methods exist for using the L1SYNC–PSYNC pins: one-clock-prior mode and
envelope mode (see Figure 4-2). In one-clock-prior mode, the sync signals should go active
for a single clock period prior to an 8-bit time slot. In envelope mode, the sync signals should
go active on the first bit of the time slot and stay active the entire time slot. The envelope
mode is more general, allowing a time slot to be from one to N bits long.
An example of the use of the L1SYNC and PSYNC sync signals in the envelope mode is
shown in Figure 4-3. The three PCM channels defined in the figure show some of the
flexibility available in the PCM highway envelope mode. As shown, PCM channel time slots
do not have to be contiguous in the PCM highway, but rather can be separated by other time
slots. Also, PCM channel time slots need not be an even multiple of eight bits in envelope
mode. Although not shown in the figure, it is also possible to route multiple PCM channels
to a single SCC, causing the SCC to process one higher speed data stream.
The PCM highway interface also supports the RTS signal for SCC1. It will be asserted when
SCC1 desires to transmit over the PCM highway and will stay asserted until the entire frame
is transmitted (regardless of how many time slots that takes).
Table 4-2. Sync Signal Functions in PCM Highway Mode
L1SYNC
PSYNC
SELECTION
0
0
1
1
0
1
0
1
No Channel Selected
PCM Channel 1 Selected
PCM Channel 2 Selected
PCM Channel 3 Selected
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