參數(shù)資料
型號(hào)： ML53612
廠商： OKI SEMICONDUCTOR CO., LTD.
英文描述： 64-Channel Full Duplex H.100/H.110 CT Bus System Interface and Time-Slot Interchange
中文描述： 64通道全雙工H.100/H.110 CT總線系統(tǒng)接口和時(shí)隙交換
文件頁(yè)數(shù)： 10/68頁(yè)
文件大?。?/td> 696K
代理商： ML53612
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ML53612
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Oki Semiconductor
FR_COMP_N
Compatibility frame sync used by SCbus, MVIP-90, and H-MVIP. (I/O, TTL Schmitt, 24 mA, 5V tolerant)
SCLK
SCbus Clock. (I/O, TTL Schmitt, 24 mA, 5V tolerant)
SCLKX2_N
SCbus X2 Clock. (I/O, TTL Schmitt, 24 mA, 5V tolerant)
C2
MVIP-90 2.048 MHz Clock. (I/O, TTL Schmitt, 6 mA, 5V tolerant)
C4_N
MVIP-90 4.096 MHz Clock. (I/O, TTL Schmitt, 6 mA, 5V tolerant)
C16_POS_N
H-MVIP 16.384 MHz Positive active low Clock. High to low transition on frame boundary. (I/O, TTL Schmitt, 24 mA, 5V tolerant)
C16_NEG_N
H-MVIP 16.384 MHz Negative active low Clock. Low to high transition on frame boundary. (I/O, TTL Schmitt, 24 mA, 5V tolerant)
L_CLK_1
Local bus Clock 1. (I/O, TTL Schmitt, 24 mA, 50 k Pull Up, 5 V tolerant)
L_FS_1
Local bus Frame Sync 1. (I/O, TTL Schmitt, 24 mA, 50 k Pull Up, 5V tolerant)
L_CLK_0
Local bus Clock 0. (I/O, TTL Schmitt, 24 mA, 50 k Pull Up, 5 V tolerant)
L_FS_0
Local bus Frame Sync 0. (I/O, TTL Schmitt, 50 k Pull Up, 24 mA, 5V tolerant)
L_SO_[1:0]
Local bus Serial Output Data Streams. (I/O, TTL Schmitt, 50 k Pull Up, 8 mA, 5V tolerant)
MC_CLK
Message Channel Clock Output. (I/O, TTL Schmitt, 50 k Pull Up, 6 mA, 5V tolerant)
MC_RXD
Message Channel Receive Data Output. (I/O, TTL Schmitt, 50 k Pull Up, 6 mA, 5V tolerant)
GPIO_[3:0]
General Purpose I/O ports. (I/O, TTL Schmitt, 24 mA, 50 k Pull Up, 5V tolerant)
TDO
Test Access Port Data Output. (Output, 6 mA, 5V tolerant)
NC
No Connect
VDDO
+3.3 Volt I/O Power Supply
VSSO
I/O Ground
VDDC
+3.3 Volt Core Power Supply
VSSC
Core Ground
1.
Signals ending in “_N” are active low.
Signal Description
[1]
Name
Description
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