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參數(shù)資料
| 型號： | ML53612 |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | 64-Channel Full Duplex H.100/H.110 CT Bus System Interface and Time-Slot Interchange |
| 中文描述： | 64通道全雙工H.100/H.110 CT總線系統(tǒng)接口和時隙交換 |
| 文件頁數(shù)： | 43/68頁 |
| 文件大?。?/td> | 696K |
| 代理商： | ML53612 |
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I
ML53612
I
39
Oki Semiconductor
5.6 Stream Switch Routing Registers, AR = 1007h:1000h (Ch. 7:0)
Note: To ensure compatibility with possible future versions of this device, write “0” to all "Reserved" bits in the
routing registers. All "Reserved" routing registers read-back "0".
Partition [1:0] (Read/Write)
Selects which time-slots are used when rate conversion is taking place. See the following table for a
description of the partition function.
DR_0
Definition
[4:0]
Input Data Stream [4:0]
[7:5]
Reserved (write zero)
Input Data Stream [4:0] (Read/Write)
00h
01h
02h
1eh
1fh
→
→
→
CT_D_[0] (Default)
CT_D_[1]
CT_D_[2]
CT_D_[30]
CT_D_[31]
→
→
DR_1
Definition
[4:0]
Output Data Stream [4:0]
[6:5]
Reserved (write zero)
7
Output Enable
Output Data Stream [4:0] (Read/Write)
00h
01h
02h
1eh
1fh
→
→
→
CT_D_[0] (Default)
CT_D_[1]
CT_D_[2]
CT_D_[30]
CT_D_[31]
→
→
Output Enable (Read/Write)
0
1
→
→
Output Disabled (Default)
Output Enabled
DR_2
Definition
[1:0]
Partition [1:0]
[7:2]
Reserved (write zero)
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