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參數(shù)資料
| 型號： | ML53612 |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | 64-Channel Full Duplex H.100/H.110 CT Bus System Interface and Time-Slot Interchange |
| 中文描述： | 64通道全雙工H.100/H.110 CT總線系統(tǒng)接口和時隙交換 |
| 文件頁數(shù)： | 44/68頁 |
| 文件大?。?/td> | 696K |
| 代理商： | ML53612 |
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ML53612
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40
Oki Semiconductor
The Stream Switch provides a data stream-to-data stream connection capability. Switching between any
of the 32 CT Bus data streams operating at 2, 4, or 8 Mbps is supported. Eight stream switch channels are
provided. Individual time-slots are not tri-state controlled. Buffering is done on single time-slots rather
than entire frames. This trade-off complicates the connection matrix, but without this compromise it
would not be practical to implement the Stream Switch.
Depending upon the data stream rates, the stream switch provides a minimum of 256 and a maximum of
1024 uni-directional time-slot connections. Stream switches in other ML53612 devices in a system may be
used simultaneously to increase switching capability. The output of the stream switch is multiplexed
with the output of the transmit switch, with the transmit switch having priority.
5.7 Stream Switch Connection Mapping
Input Data
Stream Rate
Output Data
Stream Rate
Partition
Time-Slot Connection
2 Mbps
2 Mbps
0
0 to 1, 1 to 2, 2 to 3, … , 31 to 0
4 Mbps
0
0 to 2, 1 to 4, 2 to 6, … , 31 to 0
1
0 to 3, 1 to 5, 2 to 7, … , 31 to 1
8 Mbps
0
0 to 4, 1 to 8, 2 to 12, … , 31 to 0
1
0 to 5, 1 to 9, 2 to 13, … , 31 to 1
2
0 to 6, 1 to 10, 2 to 14, … , 31 to 2
3
0 to 7, 1 to 11, 2 to 15, … , 31 to 3
4 Mbps
2 Mbps
0
0 to 1, 2 to 2, 4 to 3, … , 62 to 0
1
1 to 1, 3 to 2, 5 to 3, … , 63 to 0
4 Mbps
0
0 to 1, 1 to 2, 2 to 3, … , 63 to 0
8 Mbps
0
0 to 2, 1 to 4, 2 to 6, … , 63 to 0
1
0 to 3, 1 to 5, 2 to 7, … , 63 to 1
8 Mbps
2 Mbps
0
0 to 1, 4 to 2, 8 to 3, … , 124 to 0
1
1 to 1, 5 to 2, 9 to 3, … , 125 to 0
2
2 to 1, 6 to 2, 10 to 3, … , 126 to 0
3
3 to 1, 7 to 2, 11 to 3, … , 127 to 0
4 Mbps
0
0 to 1, 2 to 2, 4 to 3, … , 126 to 0
1
1 to 1, 3 to 2, 5 to 3, … , 127 to 0
8 Mbps
0
0 to 1, 1 to 2, 2 to 3, … , 127 to 0
Frame Boundary
123
124
125
126
127
0
1
2
3
4
CT_D time-slots @ 4 Mbps
123
62
63
0
1
2
CT_D time-slots @ 2 Mbps
30
31
0
1
CT_D time-slots @ 8 Mbps
Figure 5. CT Bus Data Stream Switching
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