OPERATIONAL MODES Figure 24. Inrush Curren" />
參數(shù)資料
型號: MM908E622ACDWB
廠商: Freescale Semiconductor
文件頁數(shù): 36/63頁
文件大?。?/td> 0K
描述: IC QUAD HALF BRDG TRPL SW 54SOIC
標(biāo)準(zhǔn)包裝: 26
應(yīng)用: 自動鏡像控制
核心處理器: HC08
程序存儲器類型: 閃存(16 kB)
控制器系列: 908E
RAM 容量: 512 x 8
接口: SCI,SPI
輸入/輸出數(shù): 12
電源電壓: 9 V ~ 16 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 54-BSSOP(0.295",7.50mm 寬)裸露焊盤
包裝: 管件
供應(yīng)商設(shè)備封裝: 54-SOICW-EP
Analog Integrated Circuit Device Data
Freescale Semiconductor
41
908E622
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
Figure 24. Inrush Current Limitation on HS Outputs
High Side Current Recopy
Each high side has an additional sense output to allow a
current recopy feature. This sense source is internally
connected to a shunt resistor. The drop voltage is amplified
and switched to the Analog Multiplexer.
Switchable HVDD Outputs
The HVDD pin is a switchable 5.0 V output pin. It can be
used for driving external circuitry which requires a 5.0 V
voltage. The output is enabled with the PSON bit in the
System Control register and can be switched on / off with the
HVDD_ON bit in the High Side Out register. Low or high
voltage conditions (LVIF / HVIF) will have no influence on this
circuitry.
HVDD Over-temperature Protection
The output is protected against over-temperature
conditions.
HVDD Over-current Protection
The HVDD output is protected against over-current. In
case the current reach the over-current limit, the output
current will be limited and the HVDDOCF over-current flag in
the System Status register is set.
High Side Out Register (HSOUT)
HVDD-ON — HVDD On Bit
This read/write bit enables the HVDD output. Reset clears
the HVDDON bit.
1 = HVDD enabled
0 = HVDD disabled
HSxON — High Side on/off Bits
These read/write bits turn on the High Side FETs
permanently. Reset clears the HSxON bits.
1 = High Side x is turned on
0 = High Side x is turned off
HSxPWM — High Side PWM on/off Bits
These read/write bits enable the PWM control of the High
Side FETs. Reset clears the HSxPWM bits.
1 = High Side x is controlled by PWM input signal
0 = High Side x is not controlled by PWM input signal
HS Current
HS Over-Current Shutdown Threshold
PWM Terminal
t
Register Name and Address: HSOUT - $02
Bit7
6
5
4
3
2
1
Bit0
Read
HVDD
ON
0
HS3P
WM
HS2P
WM
HS1P
WM
HS3O
N
HS2O
N
HS1O
N
Write
Reset
0
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