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參數(shù)資料
| 型號(hào)： | MR80C32-25SBR |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, 25 MHz, MICROCONTROLLER, CQCC44 |
| 文件頁數(shù)： | 10/80頁 |
| 文件大小： | 5152K |
| 代理商： | MR80C32-25SBR |
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201
2466T–AVR–07/10
ATmega16(L)
Analog
Comparator
The Analog Comparator compares the input values on the positive pin AIN0 and negative pin
AIN1. When the voltage on the positive pin AIN0 is higher than the voltage on the negative pin
AIN1, the Analog Comparator Output, ACO, is set. The comparator’s output can be set to trigger
the Timer/Counter1 Input Capture function. In addition, the comparator can trigger a separate
interrupt, exclusive to the Analog Comparator. The user can select Interrupt triggering on com-
parator output rise, fall or toggle. A block diagram of the comparator and its surrounding logic is
shown in Figure 97
.
Figure 97. Analog Comparator Block Diagram(2)
Notes:
1. See Table 80 on page 203.
2. Refer to Figure 1 on page 2 and Table 25 on page 58 for Analog Comparator pin placement.
Special Function IO
Register – SFIOR
Bit 3 – ACME: Analog Comparator Multiplexer Enable
When this bit is written logic one and the ADC is switched off (ADEN in ADCSRA is zero), the
ADC multiplexer selects the negative input to the Analog Comparator. When this bit is written
logic zero, AIN1 is applied to the negative input of the Analog Comparator. For a detailed
description of this bit, see “Analog Comparator Multiplexed Input” on page 203.
ACBG
BANDGAP
REFERENCE
ADC MULTIPLEXER
OUTPUT
ACME
ADEN
(1)
Bit
7
6
5
4
3
2
1
0
ADTS2
ADTS1
ADTS0
–
ACME
PUD
PSR2
PSR10
SFIOR
Read/Write
R/W
R
R/W
Initial Value
0
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