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| 型號(hào)： | MR80C32-25SBR |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, 25 MHz, MICROCONTROLLER, CQCC44 |
| 文件頁(yè)數(shù)： | 27/80頁(yè) |
| 文件大?。?/td> | 5152K |
| 代理商： | MR80C32-25SBR |
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218
2466T–AVR–07/10
ATmega16(L)
sions. For a complete description of this bit, see “The ADC Data Register – ADCL and ADCH” on
Bits 4:0 – MUX4:0: Analog Channel and Gain Selection Bits
The value of these bits selects which combination of analog inputs are connected to the ADC.
These bits also select the gain for the differential channels. See Table 84 for details. If these bits
are changed during a conversion, the change will not go in effect until this conversion is
complete (ADIF in ADCSRA is set).
Table 84. Input Channel and Gain Selections
MUX4..0
Single Ended
Input
Positive Differential
Input
Negative Differential
Input
Gain
00000
ADC0
00001
ADC1
00010
ADC2
00011
ADC3
N/A
00100
ADC4
00101
ADC5
00110
ADC6
00111
ADC7
01000
ADC0
10x
01001
ADC1
ADC0
10x
01010
ADC0
200x
01011
ADC1
ADC0
200x
01100
ADC2
10x
01101
ADC3
ADC2
10x
01110
ADC2
200x
01111
ADC3
ADC2
200x
10000
ADC0
ADC1
1x
10001
ADC1
1x
10010
N/A
ADC2
ADC1
1x
10011
ADC3
ADC1
1x
10100
ADC4
ADC1
1x
10101
ADC5
ADC1
1x
10110
ADC6
ADC1
1x
10111
ADC7
ADC1
1x
11000
ADC0
ADC2
1x
11001
ADC1
ADC2
1x
11010
ADC2
1x
11011
ADC3
ADC2
1x
11100
ADC4
ADC2
1x
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