參數(shù)資料
型號(hào): MR80C32-25SBR
廠商: TEMIC SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, 25 MHz, MICROCONTROLLER, CQCC44
文件頁(yè)數(shù): 30/80頁(yè)
文件大?。?/td> 5152K
代理商: MR80C32-25SBR
221
2466T–AVR–07/10
ATmega16(L)
Special FunctionIO
Register – SFIOR
Bit 7:5 – ADTS2:0: ADC Auto Trigger Source
If ADATE in ADCSRA is written to one, the value of these bits selects which source will trigger
an ADC conversion. If ADATE is cleared, the ADTS2:0 settings will have no effect. A conversion
will be triggered by the rising edge of the selected Interrupt Flag. Note that switching from a trig-
ger source that is cleared to a trigger source that is set, will generate a positive edge on the
trigger signal. If ADEN in ADCSRA is set, this will start a conversion. Switching to Free Running
mode (ADTS[2:0]=0) will not cause a trigger event, even if the ADC Interrupt Flag is set
.
Bit 4 – Res: Reserved Bit
This bit is reserved for future use. To ensure compatibility with future devices, this bit must be
written to zero when SFIOR is written.
Bit
765
4
3
210
ADTS2
ADTS1
ADTS0
ACME
PUD
PSR2
PSR10
SFIOR
Read/Write
R/W
R
R/W
Initial Value
0
Table 86. ADC Auto Trigger Source Selections
ADTS2
ADTS1
ADTS0
Trigger Source
0
Free Running mode
0
1
Analog Comparator
0
1
0
External Interrupt Request 0
0
1
Timer/Counter0 Compare Match
1
0
Timer/Counter0 Overflow
1
0
1
Timer/Counter1 Compare Match B
1
0
Timer/Counter1 Overflow
1
Timer/Counter1 Capture Event
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