參數(shù)資料
型號(hào)： MR80C32-25SBR
廠商： TEMIC SEMICONDUCTORS
元件分類(lèi)： 微控制器/微處理器
英文描述： 8-BIT, 25 MHz, MICROCONTROLLER, CQCC44
文件頁(yè)數(shù)： 44/80頁(yè)
文件大小： 5152K
代理商： MR80C32-25SBR
244
XMEGA A [MANUAL]
8077I–AVR–11/2012
The USART in master SPI mode does not include the SPI write collision feature
The USART in master SPI mode does not include the SPI double speed mode feature, but this can be achieved by
configuring the baud rate generator accordingly
Interrupt timing is not compatible
Pin control differs due to the master-only operation of the USART in SPI master mode
A comparison of the USART in master SPI mode and the SPI pins is shown Table 21-6.
Table 21-6. Comparison of USART in master SPI mode and SPI pins.
21.12 Multiprocessor Communication Mode
The multiprocessor communication mode effectively reduces the number of incoming frames that have to be handled by
the receiver in a system with multiple microcontrollers communicating via the same serial bus. In this mode, a dedicated
bit in the frames is used to indicate whether the frame is an address or data frame type.
If the receiver is set up to receive frames that contain five to eight data bits, the first stop bit is used to indicate the frame
type. If the receiver is set up for frames with nine data bits, the ninth bit is used. When the frame type bit is one, the frame
contains an address. When the frame type bit is zero, the frame is a data frame. If 5-bit to 8-bit character frames are
used, the transmitter must be set to use two stop bits, since the first stop bit is used for indicating the frame type.
If a particular slave MCU has been addressed, it will receive the following data frames as usual, while the other slave
MCUs will ignore the frames until another address frame is received.
21.12.1 Using Multiprocessor Communication Mode
The following procedure should be used to exchange data in multiprocessor communication mode (MPCM):
1.
All slave MCUs are in multiprocessor communication mode.
2.
The master MCU sends an address frame, and all slaves receive and read this frame.
3.
Each slave MCU determines if it has been selected.
4.
The addressed MCU will disable MPCM and receive all data frames. The other slave MCUs will ignore the data
frames.
5.
When the addressed MCU has received the last data frame, it must enable MPCM again and wait for a new
address frame from the master.
The process then repeats from step 2.
Using any of the 5-bit to 8-bit character frame formats is impractical, as the receiver must change between using n and
n+1 character frame formats. This makes full-duplex operation difficult, since the transmitter and receiver must use the
same character size setting.
21.13 IRCOM Mode of Operation
IRCOM mode can be enabled to use the IRCOM module with the USART. This enables IrDA 1.4 compliant modulation
and demodulation for baud rates up to 115.2kbps. When IRCOM mode is enabled, double speed mode cannot be used
for the USART.
For devices with more than one USART, IRCOM mode can be enabled for only one USART at a time. For details, refer to
.
USART
SPI
Comment
TxD
MOSI
Master out only
RxD
MISO
Master in only
XCK
SCK
Functionally identical
N/A
SS
Not supported by USART in master SPI mode
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