參數(shù)資料
型號： MR80C32-25SBR
廠商： TEMIC SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： 8-BIT, 25 MHz, MICROCONTROLLER, CQCC44
文件頁數(shù)： 54/80頁
文件大?。?/td> 5152K
代理商： MR80C32-25SBR
254
XMEGA A [MANUAL]
8077I–AVR–11/2012
22.3.3 CTRL – Control register
Bit 7:4 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to zero
when this register is written.
Bit 3:0 – EVSEL [3:0]: Event Channel Selection
These bits select the event channel source for the IRCOM receiver according to Table 22-1 on page 254. If event input is
selected for the IRCOM receiver, the input from the USART’s RX pin is automatically disabled
Table 22-1. Event channel selection.
22.4
Register Summary
Bit
76543210
+0x00
–
EVSEL[3:0]
Read/Write
RRRR
R/W
Initial Value
00000000
EVSEL[3:0]
Group configuration
Event Source
0000
None
0001
(Reserved)
0010
(Reserved)
0011
(Reserved)
0100
(Reserved)
0101
(Reserved)
0110
(Reserved)
0111
(Reserved)
1nnn
CHn
Event system channel n; n = {0, …,7}
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Page
+0x00
CTRL
–
EVSEL[3:0]
+0x01
TXPLCTRL
TXPLCTRL[7:0]
+0x02
RXPLCTRL
RXPLCTRL[7:0]
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