![](http://datasheet.mmic.net.cn/370000/MT90500_datasheet_16723832/MT90500_46.png)
MT90500
46
can be set to a length of 47 (long end = 46, long/short = 0), and programmed with one cell event, as we have
described. A typical application of the MT90500 might have the first of the three schedulers set this way to
support AAL1 N=1.
It can be seen that for N not equal to one, we can program our CBR-AAL0 scheduler a number of different
ways. The most nearly constant cell rate will occur when we space the N cells evenly over the 48 frames. In our
example of N = 6, we can send 6 cells together, wait 48 frames, send 6 cells, etc. But to achieve a more
constant cell rate (to lower cell delay variation) we would want to send a cell and wait 8 frames, send another
cell and wait 8 frames etc. By spacing the cell events 8 frames apart, our 48 frame scheduler example works
identically to our 8 frame scheduler example. Thus it is always desirable to space the N cells as evenly as
possible over the scheduler (remembering that the end of the scheduler will wrap back to the beginning of the
scheduler).
It can be seen that where a scheduler of length M is required, a scheduler of length K*M may be used (K is an
integer). In an M frame scheduler we would program N cell events, in a K*M scheduler we would program K*N
events. This allows us to use one scheduler to support several different cell sizes M. In the MT90500, a
scheduler may be up to 256 frames long. A scheduler of length 240 (long end = 239, long/short = 0), for
example, supports cell sizes of 48, 40, 30, 24, 20,16, 12, 10, 8, and 5. A scheduler of length 160 (long end =
159, long/short = 0) supports cell sizes of 40, 32, 30, 20, 16, 10, 8, and 5. A typical application of the MT90500
might have the second of the three schedulers set to 240 or 160 to support various lengths of partially-filled
cells, CBR-AAL0, and/or CBR-AAL5.
4.3.1.3.3
AAL1 Long/Short Schedulers
A scheduler for AAL1 may need to be slightly more complex than a scheduler for CBR-AAL0. When N is not
equal to one, Nx64 AAL1 cells are not all of the same TDM payload size. When following the ITU-T Rec. I.363.1
standard, one cell in eight will carry a pointer. Cells without pointers carry 47 TDM bytes, and cells with
pointers carry 46 TDM bytes. (An AAL1 sequence number byte is always present, completing the 48-byte ATM
cell payload.) Although the individual cell length varies, the AAL1 eight-cell sequence contains a constant 375
bytes of TDM payload (46 + 7 * 47 = 375) for an average TDM payload of 46.875 bytes per cell.
For the AAL1 case, we therefore wish to fit the N TDM bytes per frame into the 375 TDM payload bytes of an
eight-cell sequence, at a constant rate. We could create a scheduler 375 frames long, and program it to send N
eight-cell sequences:
375 frames * N bytes/frame = 375 * N bytes = N eight-cell sequences * 375 bytes / eight-cell sequence
or
375 frames * N bytes/frame = 375 * N bytes = N * 8 cells * 46.875 bytes/cell
Our scheduler of 375 frames length would be programmed for N * 8 cells, and achieve constant bit rate.
It can be seen that we always program a multiple of 8 cell events into the scheduler, (N * 8 cells) this means
that we can take a short-cut, and divide everything by 8. The schedulers in the MT90500 can be said to “fold”
the 375 frames into 8 turns of the long/short scheduler (1 “short” turn of 46 frames, and 7 “l(fā)ong” turns of 47
frames). Instead of programming N * 8 cells into the 375 long scheduler, we program N cells into the 375/8
scheduler:
(7 turns * 47 frames/turn + 1 turn * 46 frames/turn) * N bytes/frame
= 375 frames * N bytes/frame
= (375 * N) bytes
and
N cells/turn * (7 turns * 47 bytes/cell + 1 turn * 46 bytes/cell)
= N cells/turn * (8 turns * 46.875 bytes/cell)
= (375 * N) bytes
Note that the “short” turn of the scheduler must still contain N cells, this means that we can not program a cell
into the last frame of the “l(fā)ong” turn, because this last frame is not used during the “short” turn, and this cell
would not be sent.