SECTION 3
PCI 9080
FUNCTIONAL DESCRIPTION
PLX Technology, Inc., 1997
Page 16
Version 1.02
3.3.3 Extra Long Serial EEPROM Load
An Extra Long Load mode is provided in the PCI 9080
(refer to Table 4-39) to load an additional five Lwords
from the serial EEPROM. If bit 25 is set to 1 in the Local
Bus Region Descriptor Register (LOC:98h) (refer to
Table 4-39), the following five Lword registers are loaded
in addition to normal Long Load process (refer to Section
3.3.2, “Long Serial EEPROM Load”). Bit 25 must be set
to 1 during the Long Load Process. (Refer to Table 3-4.)
Table 3-4. Extra Long Serial EEPROM Load
Registers
Serial
EEPROM
Offset
Description
44
Subsystem ID
46
Subsystem Vendor ID
48
MSW of Range for PCI to Local Address Space 1
(1 MB)
4A
LSW of Range for PCI to Local Address Space 1
(1 MB)
4C
MSW of Local Base Address (Remap) for PCI
to Local Address Space 1
4E
LSW of Local Base Address (Remap) for PCI
to Local Address Space 1
50
MSW of Bus Region Descriptors (Space 1) for PCI
to local accesses
52
LSW of Bus Region Descriptors (Space 1) for PCI
to local accesses
54
MSW of PCI Base Address for local expansion ROM
56
LSW of PCI Base Address for local expansion ROM
3.3.4 Recommended Serial EEPROMs
A 1K bit (National NM93CS46 or compatible) or 2K bit
(National NM93CS56 or compatible) device can be
used. Table 3-5 lists the recommended serial EEPROM
loads. Refer also to Table 5-2 in Section 5, “Pin
Description.”
Table 3-5. Recommended Serial EEPROM Loads
Load
Unused Bytes For
CS46 (1K)
Unused Bytes For
CS56 (2K)
Short
108
364
Long
60
316
Extra Long
40
296
Note:
that do not support sequential read and write (such as
the NM93C46 or NM93C56).
PCI 9080 does not support serial EEPROMs
3.3.5 Programming the Serial EEPROM
The serial EEPROM can be written or read, using bits
[28:24] of the Serial EEPROM Control Register (refer to
Table 4-59[28:24]).
3.4 INTERNAL REGISTER ACCESS
PCI 9080 chip provides several internal registers,
allowing for maximum flexibility in bus interface design
and performance. The register types are accessible from
both the PCI and local buses, including the following:
PCI configuration registers
Local configuration registers
Mailbox registers
Doorbell registers
DMA registers
Messaging queue registers (I
2
O)
Figure 3-2 illustrates how these registers are accessed.
Figure 3-2. PCI 9080 Internal Register Access