
Data Sheet
27
Rev. 1.0, 2005-06-02
OctalLIU
TM
PEF 22508 E
Pin Descriptions
D14
XL1.7
O
(analog)
–
Transmit Line 1, port 7
Analog output to the external transformer. Selected if
LIM1.DRS is cleared. After reset this pin is in high-
impedance state until bit MR0.XC1 is set and
XPM2.XLT is cleared.
XOID7
O
–
Transmit Optical Interface Data, port 7
Data in CMI code is shifted out with 50% or 100% duty
cycle on both transitions of XCLK7 according to the CMI
coding. Output polarity is selected by bit LIM0.XDOS
(after reset: data is sent active high). The single-rail
mode is selected if LIM1.DRS is set and MR0.XC1 is
cleared. After reset this pin is in high-impedance state
until register LIM1.DRS is set and XPM2.XLT is cleared.
D13
XL2.7
O
(analog)
–
Transmit Line 2, port 7
Analog output for the external transformer. Selected if
LIM1.DRS is cleared. After reset this pin is in high-
impedance state until bit MR0.XC1 is set and
XPM2.XLT is cleared.
C14
XL3.7
I (analog) –
Transmit Line 3, port 7
Analog transmit input 1.
C13
XL4.7
I (analog) –
Transmit Line 4, port 7
Analog transmit input 2.
E11
XL1.8
O
(analog)
–
Transmit Line 1, port 8
Analog output to the external transformer. Selected if
LIM1.DRS is cleared. After reset this pin is in high-
impedance state until bit MR0.XC1 is set and
XPM2.XLT is cleared.
XOID8
O
–
Transmit Optical Interface Data, port 8
Data in CMI code is shifted out with 50% or 100% duty
cycle on both transitions of XCLK8 according to the CMI
coding. Output polarity is selected by bit LIM0.XDOS
(after reset: data is sent active high). The single-rail
mode is selected if LIM1.DRS is set and MR0.XC1 is
cleared. After reset this pin is in high-impedance state
until register LIM1.DRS is set and XPM2.XLT is cleared.
E10
XL2.8
O
(analog)
–
Transmit Line 2, port 8
Analog output for the external transformer. Selected if
LIM1.DRS is cleared. After reset this pin is in high-
impedance state until bit MR0.XC1 is set and
XPM2.XLT is cleared.
D11
XL3.8
I (analog) –
Transmit Line 3, port 8
Analog transmit input 1.
D10
XL4.8
I (analog) –
Transmit Line 4, port 8
Analog transmit input 2.
Clock Signals
Table 1
I/O Signals (cont’d)
Pin No. Ball
No.
Name
Pin Type Buffer
Type
Function