參數(shù)資料
型號: PEF22508E
廠商: INFINEON TECHNOLOGIES AG
元件分類: 數(shù)字傳輸電路
英文描述: DATACOM, PCM TRANSCEIVER, PBGA256
封裝: 17 X 17 MM, 1 MM PITCH, PLASTIC, LBGA-256
文件頁數(shù): 133/193頁
文件大小: 10683K
代理商: PEF22508E
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁當(dāng)前第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁第165頁第166頁第167頁第168頁第169頁第170頁第171頁第172頁第173頁第174頁第175頁第176頁第177頁第178頁第179頁第180頁第181頁第182頁第183頁第184頁第185頁第186頁第187頁第188頁第189頁第190頁第191頁第192頁第193頁
OctalLIU
TM
PEF 22508 E
Functional Description
Data Sheet
44
Rev. 1.0, 2005-06-02
n: even address
3.5.2
Serial Micro Controller Interfaces
Two serial interfaces are included to enable device programming and controlling:- Slave Serial Control Interface
(SCI) - Slave Serial Peripheral Interface (SPI)
By using the SCI Interface, the OctalLIU
TM can be easily connected to Infineon interworking devices plus Infineon
SHDSL- and ADSL-PHYs so that implementation of different line transmission technologies on the same line card
easily is possible. The SCI interface is a three-wire bus and optionally replaces the parallel processor interface to
reduce wiring overhead on the PCB, especially if multiple devices are used on a single board. Data on the bus is
HDLC encapsulated and uses a message-based communication protocol.
If SCI interface with multipoint to multipoint configuration is used, address pins A(5:0) are used for SCI source
(slave) address pin strapping, see Table 2.
Note that after a reset writing into or reading from OctalLIU
TM registers using the SCI- or SPI-Interface is not
possible until the PLL is locked: If the SCI-Interface is used no acknowledge message will be sent by the
OctalLIU
TM. If the SPI-Interface is used pin SDO has high impedance (SDO is pulled up by external resistor). To
trace if the SPI interface is accessible, the micro controller should poll for example the register DSTR so long as
it read no longer the value F
H .
3.5.2.1
SCI Interface
The Serial Control Interface (SCI) is selected if IM(1:0) is strapped to 11
H.
The OctalLIU
TM SCI interface is always a slave.
Figure 49 shows the timing diagram of the SCI interface, Table 56 gives the appropriate values of the timing
parameters.
Figure 6 shows a first application using the SCI interfaces of some OctalLIU
TMs where point to point full duplex
connections are realized between every OctalLIU
TM and the micro controller. Here the data out pins of the SCI
interfaces (SCI_TXD) of the OctalLIU
TMs must be configured as push-pull (PP), see configuration register bit PP
Figure 7 shows an application with Multipoint to multipoint connections between the OctalLIU
TMs and the micro
controller (half duplex). Here the data out pin of the SCI interfaces (SCI_TXD) of all OctalLIU
TMs must be
configured as an open Drain (oD), see configuration register bit PP in Table 8. The data out and data in pins
(SCI_RXD, SCI_TXD) of each OctalLIU
TM are connected together to form a common data line. Together with a
common pull up resistor for the data line, all open Drain data out pins are building a wired And.
The Infineon proprietary Daisy-Chain approach is not supported
The group address of the SCI interface is 00
H after reset. Recommendation for configuring is C4H to be different
to the group addresses of all other Infineon devices.
In case of multipoint to multipoint applications the 6 MSBs of the SCI source address will be defined by
pinstrapping of the address pins A5 to A0. The two LSBs of the SCI source address are constant 10B, see
Table 8. The SCI source address can be overwritten by a write command into the SCI configuration register. For
applications with point to point connections for the SCI interface the source address is not valid.
Because 14 bits are used for the register addresses in the SCI interface macro the two MSBs of the 16 bit wide
register addresses are set fixed to zero.
Intel
(Address n + 1)
(Address n)
Motorola
(Address n)
(Address n + 1)
Data lines
D15
D8
D7
D0
相關(guān)PDF資料
PDF描述
PEF22554E DATACOM, FRAMER, PBGA160
PEF22554HT DATACOM, FRAMER, PQFP144
PES12-42S-N0024
PESD3V3V4UK,132 25 W, UNIDIRECTIONAL, 4 ELEMENT, SILICON, TVS DIODE
PF38F3050L0YUQ3A SPECIALTY MEMORY CIRCUIT, PBGA88
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PEF22508EV1.1-G 功能描述:網(wǎng)絡(luò)控制器與處理器 IC T/E RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流(最大值):595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
PEF22508EV11G 制造商:Rochester Electronics LLC 功能描述: 制造商:Infineon Technologies AG 功能描述:
PEF22508EV11GXP 制造商:Lantiq 功能描述:LINE INTERFACE UNITS
PEF22508EV11GXT 制造商:Lantiq 功能描述:LINE INTERFACE UNITS
PEF22509EV1.1 制造商:Infineon Technologies AG 功能描述:SP000205605_T/E ASIC_TY_PB