參數(shù)資料
型號(hào): pentium II cpu
廠商: Intel Corp.
英文描述: Pentium II Processor AT 450MHZ(工作頻率450兆赫茲奔II處理器)
中文描述: 奔騰II處理器在450MHz(工作頻率450兆赫茲奔二處理器)
文件頁(yè)數(shù): 24/84頁(yè)
文件大小: 1092K
代理商: PENTIUM II CPU
Pentium
II Processor at 350 MHz, 400 MHz, and 450 MHz
24
Datasheet
NOTES:
1. Unless otherwise noted, all specifications in this table apply to all Pentium
II processor frequencies and cache sizes.
2. V
IH
and V
OH
for the Pentium II processor may experience excursions of up to 200 mV above V
TT
for a single system bus
clock. However, input signal drivers must comply with the signal quality specifications in
Section 3.0
.
3. Minimum and maximum V
TT
are given in
Table 8
.
4. (0
V
IN
2.0 V +5%).
5. (0
V
OUT
2.0 V +5%).
6. Refer to the I/O Buffer Models for IV characteristics.
7. Parameter correlated to measure into a 25
resistor terminated to 1.5 V.
8. Refer to the IO Buffer Models for IV characteristics.
NOTES:
1. Unless otherwise noted, all specifications in this table apply to all Pentium
II processor frequencies and cache sizes.
2. Parameter measured at 14 mA (for use with TTL inputs).
3. (0
V
IN
2.5 V +5%).
4. (0
V
OUT
2.5 V +5%).
2.12
AGTL+ System Bus Specifications
It is recommended that the AGTL+ bus be routed in a daisy-chain fashion with termination
resistors to V
TT
at each end of the signal trace. These termination resistors are placed electrically
between the ends of the signal traces and the V
TT
voltage supply and generally are chosen to
approximate the substrate impedance. The valid high and low levels are determined by the input
buffers using a reference voltage called V
REF
.
Table 8
lists the nominal specification for the AGTL+ termination voltage (V
TT
). The AGTL+
reference voltage (V
REF
) is generated on the processor substrate for the processor core, but should
be set to 2/3 V
TT
for other AGTL+ logic using a voltage divider on the motherboard. It is important
that the motherboard impedance be specified and held to a 65
±15% tolerance, and that the
Table 6.
AGTL+ Signal Groups DC Specifications
1
Symbol
Parameter
Min
Max
Unit
Notes
V
IL
Input Low Voltage
–0.3
0.82
V
V
IH
Input High Voltage
1.22
V
TT
V
2, 3, 7, 8
Ron
Buffer On Resistance
16.67
6
I
L
Leakage Current
±100
μA
4
I
LO
Output Leakage Current
±15
μA
5
Table 7.
Non-AGTL+ Signal Group DC Specifications
1
Symbol
Parameter
Min
Max
Unit
Notes
V
IL
Input Low Voltage
–0.3
0.5
V
V
IH
Input High Voltage
2.0
2.625
V
2.5 V +5% maximum
V
OL
Output Low Voltage
0.4
V
2
V
OH
Output High Voltage
N/A
2.625
V
All outputs are open-
drain to 2.5 V +5%
I
OL
Output Low Current
14
mA
I
LI
Input Leakage Current
±100
μA
3
I
LO
Output Leakage Current
±15
μA
4
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