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參數(shù)資料
| 型號： | pentium II cpu |
| 廠商： | Intel Corp. |
| 英文描述： | Pentium II Processor AT 450MHZ(工作頻率450兆赫茲奔II處理器) |
| 中文描述： | 奔騰II處理器在450MHz（工作頻率450兆赫茲奔二處理器） |
| 文件頁數(shù)： | 36/84頁 |
| 文件大?。?/td> | 1092K |
| 代理商： | PENTIUM II CPU |
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Pentium
II Processor at 350 MHz, 400 MHz, and 450 MHz
36
Datasheet
3.0
System Bus Signal Simulations
Signals driven on the Pentium II processor system bus should meet signal quality specifications to
ensure that the components read data properly and to ensure that incoming signals do not affect the
long term reliability of the component. Specifications are provided for simulation at the processor
core; guidelines are provided for correlation to the processor edge fingers. These edge finger
guidelines are intended for use during testing and measurement of system signal integrity.
Violations of these guidelines are permitted, but if they occur, simulation of signal quality at the
processor core should be performed to ensure that no violations of signal quality specifications
occur. Meeting the specifications at the processor core in
Table 21
,
Table 23
, and
Table 25
ensures
that signal quality effects will not adversely affect processor operation, but does not necessarily
guarantee that the guidelines in
Table 22
,
Table 24
, and
Table 26
will be met.
Figure 11. Test Timings (TAP Connection)
Figure 12. Test Reset Timings
TCK
TDI, TMS
Input
Signals
TDO
Output
Signals
PCB766a
1.25V
T
v
T
w
T
r
T
s
T
x
T
u
T
y
T
z
1.25V
T
r
T
s
T
u
T
v
T
w
T
x
T
y
T
z
T43 (All Non-Test Inputs Setup Time)
=
T44 (All Non-Test Inputs Hold Time)
=
T40 (TDO Float Delay)
=
T37 (TDI, TMS Setup Time)
=
T38 (TDI, TMS Hold Time)
=
T39 (TDO Valid Delay)
=
T41 (All Non-Test Outputs Valid Delay)
=
T42 (All Non-Test Outputs Float Delay)
=
TRST#
PCB-773
1.25V
T
q
T
q
T37 (TRST# Pulse Wdth)
=
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