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參數(shù)資料
| 型號(hào)： | pentium II cpu |
| 廠商： | Intel Corp. |
| 英文描述： | Pentium II Processor AT 450MHZ(工作頻率450兆赫茲奔II處理器) |
| 中文描述： | 奔騰II處理器在450MHz（工作頻率450兆赫茲奔二處理器） |
| 文件頁數(shù)： | 7/84頁 |
| 文件大?。?/td> | 1092K |
| 代理商： | PENTIUM II CPU |
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Pentium
II Processor at 350 MHz, 400 MHz, and 450 MHz
Datasheet
7
1.0
Introduction
The Pentium II 350 MHz/400 MHz/450 MHz processor is the next in the Pentium II processor line
of Intel processors. The Pentium II processor, like the Pentium Pro processor, implements a
Dynamic Execution microarchitecture—a unique combination of multiple branch prediction, data
flow analysis, and speculative execution. This enables these processors to deliver higher
performance than the Pentium processor, while maintaining binary compatibility with all previous
Intel Architecture processors. The Pentium II processor also executes MMX technology
instructions for enhanced media and communication performance. The Pentium II processor
utilizes multiple low-power states such as AutoHALT, Stop-Grant, Sleep, and Deep Sleep to
conserve power during idle times.
The Pentium II processor utilizes the same multiprocessing system bus technology as the Pentium
Pro processor. This allows for a higher level of performance for both uni-processor and two-way
multiprocessor (2-way MP) systems. Memory is cacheable for up to 4 GB of addressable memory
space, allowing significant headroom for business desktop systems. Please refer to the Intel
Specification Update document’s S-spec number table to determine the cacheability for a given
processor.
The Pentium II processor system bus operates in the same manner as the Pentium Pro processor
system bus. The Pentium II processor system bus uses a variant of GTL+ signal technology called
AGTL+ signal technology. The Pentium II processor deviates from the Pentium Pro processor by
using commercially available die for the second level (L2) cache. The L2 cache (the TagRAM and
burst pipelined synchronous static RAM (BSRAM) memories) are now multiple die. Transfer rates
between a Pentium II processor’s core and L2 cache are one-half the processor core clock
frequency and scale with the processor core frequency. Both the TagRAM and BSRAM receive
clocked data directly from the Pentium II processor core. As with the Pentium Pro, the Pentium II
processor has a dedicated L2 cache bus, thus maintaining the dual independent bus architecture to
deliver high bus bandwidth and high performance (see
Figure 1
).
Pentium II processors use either a Single Edge Contact Cartridge (S.E.C.C.) or a Single Edge
Contact Cartridge 2 (S.E.C.C.2) packaging technology. These packaging technologies allow the L2
cache to remain tightly coupled to the processor, while enabling use of high volume commercial
SRAM components. The L2 cache is performance optimized and tested at the package level. The
S.E.C.C. and S.E.C.C.2 packages utilize surface mounted technology and a substrate with an edge
finger connection. Pentium II processors at 350, 400 and 450 MHz, while available at higher core
frequencies than the previously released Pentium II processors at 233, 266, 300 and 333 MHz, also
provide additional features while utilizing either a compatible S.E.C.C. package or the follow-on
S.E.C.C.2 package.
The S.E.C.C. package has the following features: an extended thermal plate, a cover, and a
substrate with an edge finger connection. The extended thermal plate allows heatsink attachment or
customized thermal solutions. The S.E.C.C.2 package has a cover and a substrate with an edge
finger conenction. This allows the thermal solutions to be placed directly onto the processor core
package. The edge finger connection maintains socketability for system configuration. The edge
finger connector is called the ‘SC 242 connector’ in this and other documentation.
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| pentium III processor | 32 bit Processor Mobile Module(32 位帶移動(dòng)模塊處理器) |
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