- 您現在的位置：買賣IC網 > PDF目錄369993 > pentium III processor (Intel Corp.) 32 bit Processor Mobile Module(32 位帶移動模塊處理器) PDF資料下載
參數資料
| 型號： | pentium III processor |
| 廠商： | Intel Corp. |
| 英文描述： | 32 bit Processor Mobile Module(32 位帶移動模塊處理器) |
| 中文描述： | 32位處理器的移動模塊（32位帶移動模塊處理器） |
| 文件頁數： | 19/67頁 |
| 文件大?。?/td> | 834K |
| 代理商： | PENTIUM III PROCESSOR |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁當前第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁
Pentium
III Processor Mobile Module MMC-2
Featuring Intel
SpeedStep
Technology
243356-005
Datasheet
13
3.1.7
Power Management Signals
Table 7
provides descriptions of the power management signals. The SM_CLK and SM_DATA
signals refer to the two-wire serial SMBus interface. Although this interface is currently used
solely for the digital thermal sensor, the SMBus contains reserved serial addresses for future use.
NOTE:
V_3ALWAYS is a 3.3-V supply and is generated whenever V_DC is available and supplied to the
PIIX4E/M resume well.
Table 7. Power Management Signal Descriptions
Name
Type
Voltage
Description
SUS_STAT1#
I
CMOS
V_3ALWAYS
Suspend Status:
This signal connects to the SUS_STAT1#
output of the PIIX4E/M. SUS_STAT1# provides information on
the host clock status and is asserted during all suspend states.
VR_ON
I
CMOS
V_3
VR_ON:
Voltage regulator ON.
This 3.3-V (5.0-V tolerant) signal
controls the operation of the voltage regulator.
VR_ON should
be generated as a function of the PIIX4E/M SUSB# signal,
which is used for controlling the “Suspend State B” voltage
planes. This signal should be driven by a digital signal with a
rise/fall time of less than or equal to 1
μ
S. (V
IL,max
=0.4V, V
IH,min
=3.0V.)
VR_PWRGD
O
V_3
VR_PWRGD:
This signal is driven high by the mobile module to
indicate that the voltage regulator is stable and is pulled low
using a 100-K resistor when inactive.
It can be used in some
combinations to generate the system PWRGOOD signal.
BXPWROK
I
CMOS
V_3
Power OK to BX:
This signal must go active at least 1 mS after
the V_3 power rail is stable and 1 mS prior to deassertion of
PCIRST#.
SM_CLK
I/O D
CMOS
V_3
Serial Clock:
This clock signal is used on the SMBus interface
to the digital thermal sensor.
SM_DATA
I/O D
CMOS
V_3
Serial Data:
An open-drain data signal on the SMBus interface
to the digital thermal sensor.
ATF_INT#
O D
CMOS
V_3
ATF Interrupt:
An open-drain output signal of the digital thermal
sensor.
相關PDF資料 |
PDF描述 |
|---|---|
| Pentium OverDrive Processor | Pentium OverDrive Processor With MMX Technology For Pentium Processor-Based System(帶MMX技術奔騰超速轉動處理器) |
| pentium pro processor | Pentium Pro Processor with 1MB L2 Cache at 200MHZ(1兆比特L2高速緩存頻率200兆赫茲處理器) |
| pentium processor with MMX | 32-bit processor with MMX technology(32位帶MMX技術處理器) |
| pentium processor | 32 Bit Processor With MMX And Mobile Module(32位帶移動模塊和MMX技術CPU) |
| PESD0603-140 | Raychem Overvoltage Devices |
相關代理商/技術參數 |
參數描述 |
|---|---|
| P-ENV568K3G3 | 制造商:Panasonic Industrial Company 功能描述:TUNER |
| PEO14012 | 制造商:TE Connectivity 功能描述:RELAY SPCO 12VDC |
| PEO14024 | 制造商:TE Connectivity 功能描述:RELAY SPCO 24VDC |
| PEO96742 | 制造商:Delphi Corporation 功能描述:ASM TERM |
| PEOODO3A | 制造商:MACOM 制造商全稱:Tyco Electronics 功能描述:Versatile Power Entry Module with Small Footprint |
發(fā)布緊急采購，3分鐘左右您將得到回復。