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參數(shù)資料
| 型號： | pentium III processor |
| 廠商： | Intel Corp. |
| 英文描述： | 32 bit Processor Mobile Module(32 位帶移動模塊處理器) |
| 中文描述： | 32位處理器的移動模塊（32位帶移動模塊處理器） |
| 文件頁數(shù)： | 41/67頁 |
| 文件大小： | 834K |
| 代理商： | PENTIUM III PROCESSOR |
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Pentium
III Processor Mobile Module MMC-2
Featuring Intel
SpeedStep
Technology
243356-005
Datasheet
35
5.3.2
Voltage Regulator Control
The VR_ON pin on the connector allows a 3.3-V signal to control the voltage regulator. The
system manufacturer can use this signal to turn the voltage regulator ON or OFF. VR_ON should
be controlled as a function of the same signal (SUSB#) used to control the system's switched 5.0-V
and 3.3-V power planes. The PIIX4E/M defines Suspend B as the Power Management state in
which power is physically removed from the processor and the voltage regulator. In this state, the
SUSB# pin on the PIIX4E/M controls these power planes. The mobile module provides the
VR_PWRGD signal, which indicates that the voltage regulator power is operating at a stable
voltage level. The system manufacturer should use this signal on the system electronics to control
power inputs and to gate PWROK to the PIIX4E/M South Bridge.
Table 25
provides the detailed
definitions and sequences of the voltage signals.
The following list includes additional specifications and clarifications of the power sequence
timing and
Figure 7
provides an illustration.
1.
The VR_ON signal may only be asserted to a logical high by a digital signal after V_DC
≥
7.5V, V_5
≥
4.5V, and V_3
≥
3.0V.
2.
The Rise Time and Fall Time of VR_ON must be less than or equal to 1.0
μ
S.
Table 25. Voltage Signal Definitions and Sequences
Signal
Source
Definitions and Sequences
V_DC
System Electronics
V_DC is required to be between 7.5V and 21.0V DC, and it is driven by
the system electronics' power supply. V_DC powers the mobile
module DC-to-DC converter for the processor core and I/O voltages.
The mobile module cannot be hot inserted or removed while
V_DC is powered on.
V_5
System Electronics
The system electronics supplies V_5 for the voltage regulator.
V_3
System Electronics
The system electronics supplies V_3 for the 82443BX and powers the
mobile module's linear regulators for generating the V_CLK and
V_CPUPU voltage rails. V_3 stays on during suspend.
V_3S
System Electronics
The system electronics supplies V_3S and is shut off during suspend.
VR_ON
System Electronics
VR_ON is a 3.3-V signal that enables the voltage regulator circuit.
When driven active high the voltage regulator circuit is activated. The
signal driving VR_ON should be a digital signal with a rise/fall time of
less than or equal to 1.0
μ
S. (V
IL,max
= 0.4V, V
IH,min
= 3.0V.)
V_CORE
Module
A result of VR_ON being asserted, V_CORE is an output of the DC-
DC regulator on the mobile module and is driven to the core voltage of
the processor.
VR_PWRGD
Module
Upon sampling the voltage level of V_CORE (minus tolerances for
ripple), VR_PWRGD is driven active high. If VR_PWRGD is not
sampled active within 1 second of the assertion of VR_ON, then the
system electronics should deassert VR_ON. After V_CORE is
stabilized, VR_PWRGD will assert to logic high (3.3V). This signal
must not be pulled up by the system electronics. VR_PWRGD should
be "logically ANDed" with V_3S to generate the PIIX4E/M input signal,
PWROK. The system electronics should monitor VR_PWRGD to verify
that it is asserted high prior to the active high assertion of PIIX4E/M
PWROK.
V_CPUPU
Module
V_CPUPU is 3.3V. The system electronics uses this voltage to power
the PIIX4E/M-to-processor interface circuitry.
V_CLK
Module
V_CLK is 2.5V. The system electronics uses this voltage to power the
HCLK[0:1] drivers for the processor clock.
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