Pericom Semiconductor 7.2.8. LINE STATUS REGISTER – " />
參數資料
型號: PI7C9X7954AFDE
廠商: Pericom
文件頁數: 52/70頁
文件大?。?/td> 0K
描述: IC PCIE-TO-UART BRIDGE 128LQFP
標準包裝: 90
應用: PCIe至UART橋接
接口: 高級配置電源接口(ACPI)
電源電壓: 1.8V, 3.3V
封裝/外殼: 128-LQFP 裸露焊盤
供應商設備封裝: 128-LQFP(14x14)
包裝: 托盤
安裝類型: 表面貼裝
PI7C9X7954
PCI Express Quad UART
Datasheet
Page 56 of 70
May 2013 – Revision 1.4
Pericom Semiconductor
7.2.8.
LINE STATUS REGISTER – OFFSET 05h
BIT
FUNCTION
TYPE
DESCRIPTION
0
Rx Data Available
RO
0b: No data in the receive FIFO
1b: Data in the receive FIFO
Reset to 0b.
1
Rx FIFO Overrun
RO
0b: No overrun error
1b: Overrun error
Reset to 0b.
2
Rx Parity Error
RO
0b: No parity error
1b: Parity error
Reset to 0b.
3
Rx Frame Error
RO
0b: No framing error
1b: Framing error
Reset to 0b.
4
Rx Break Error
RO
0b: No break condition
1b: Break condition
Reset to 0b.
5
Tx Empty
RO
0b: Tx Holding Register is not empty.
1b: Tx Holding Register is empty.
Reset to 0b.
6
Tx Complete
RO
0b: Tx Shift Register is not empty.
1b: Tx Shift Register is empty.
Reset to 0b.
7
Rx Data Error
RO
0b: No Rx FIFO error
1b: Rx FIFO error
Reset to 0b.
7.2.9.
MODEM STATUS REGISTER – OFFSET 06h
BIT
FUNCTION
TYPE
DESCRIPTION
0
Delta CTS
RO
0b: No change in CTS input.
1b: Indicates the CTS input has changed state.
This bit is read-clear.
Reset to 0b.
1
Delta DSR
RO
0b: No change in DSR input.
1b: Indicates the DSR input has changed state.
This bit is read-clear.
Reset to 0b.
2
Delta RI
RO
0b: No change in RI input
1b: Indicates the RI input has changed state from the logic 0 to
the logic 1.
This bit is read-clear.
Reset to 0b.
3
Delta DCD
RO
0b: No change in DCD input
1b: Indicates the DCD input has changed state.
This bit is read-clear.
Reset to 0b.
4
CTS
RO
0b: The CTS input state is the logic 0
1b: The CTS input state is the logic 1
Reset to 0b.
13-0093
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