參數(shù)資料
型號: PM7351
廠商: PMC-Sierra, Inc.
英文描述: OCTAL SERIAL LINK MULTIPLEXER
中文描述: 八路串行連接復(fù)用器
文件頁數(shù): 129/174頁
文件大?。?/td> 1790K
代理商: PM7351
RELEASED
PM7351 S/UNI-VORTEX
DATA SHEET
PMC-1980582
ISSUE 5
OCTAL SERIAL LINK MULTIPLEXER
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
119
DBCTRL bit overrides the HIZDATA bit. The DBCTRL bit is used to measure
the drive capability of the data bus driver pads.
PMCTST:
The PMCTST bit is used to configure the S/UNI-VORTEX for PMC's
manufacturing tests. When PMCTST is set to logic one, the S/UNI-VORTEX
microprocessor port becomes the test access port used to run the PMC
"canned" manufacturing test vectors. The PMCTST bit is logically "ORed"
with the IOTST bit, and can be cleared by setting CSB to logic one or by
writing logic zero to the bit.
PMCATST:
The PMCATST bit is used to configure the analog portion of the VORTEX for
PMC's manufacturing tests. PMCATST is cleared when CSB is high and
RSTB is low or when PMCATST is written as logic 0
Register 0x201: Master Test Control
Bit
Type
Function
Default
Bit 7
Unused
X
Bit 6
Unused
X
Bit 5
Unused
X
Bit 4
Unused
X
Bit 3
Unused
X
Bit 2
R/W
LINK_TM[2]
X
Bit 1
R/W
LINK_TM[1]
X
Bit 0
R/W
LINK_TM[0]
X
This register is used to globally control the S/UNI-VORTEX when in test mode.
LINK_TM[2:0] are reset to logic 0 when CSB is logic 1. All register bits can also be
reset by writing a logic 0 to the corresponding register bit.
LINK_TM[2:0]:
The LINK_TM[2:0] bits can be used to select which high-speed link of the
S/UNI-VORTEX is under test when the PMCTST or IOTST register bit is set
to logic 1. The LINK_TM[2:0] bits are not cleared by RSTB; therefore, they
must be written to prior to testing.
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參數(shù)描述
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