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參數(shù)資料
| 型號： | PM7351 |
| 廠商： | PMC-Sierra, Inc. |
| 英文描述： | OCTAL SERIAL LINK MULTIPLEXER |
| 中文描述： | 八路串行連接復(fù)用器 |
| 文件頁數(shù)： | 53/174頁 |
| 文件大?。?/td> | 1790K |
| 代理商： | PM7351 |
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RELEASED
PM7351 S/UNI-VORTEX
DATA SHEET
PMC-1980582
ISSUE 5
OCTAL SERIAL LINK MULTIPLEXER
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
43
common equipment to the line cards. The S/UNI-VORTEX and S/UNI-DUPLEX,
perform clock recovery, cell delineation, and header error monitoring for all
receive high-speed serial links simultaneously. The maintained error counts and
alarm status indications may be used by the control system to determine the
state and viability of each high speed serial link.
In these architectures, the S/UNI-DUPLEX will be connected to two S/UNI-
VORTEXs, one on the active common card and one on the spare common card .
Upon a failure of the active card, the spare card becomes the conduit for traffic.
The S/UNI-VORTEX facilitates link selection upon start-up as well as switching
between links upon failure conditions.
Typically a centralized resource or cooperating distributed microprocessor
subsystems will determine which common card is to be considered active for
each downstream S/UNI-DUPLEX. The key to link selection lies in how the
“ACTIVE” bit is handled by the S/UNI-VORTEX and S/UNI-DUPLEX. The control
system uses the ACTIVE bit within each of the 8 Serial Link Maintenance
registers to independently set the state of each link’s ACTIVE status. The
current state of the link’s ACTIVE bit is sent downstream once per transmitted
cell. The ACTIVE status is debounced and acted upon by the S/UNI-DUPLEX.
The S/UNI-DUPLEX will only accept data traffic from one of its two LVDS links,
and normally it is the link marked ACTIVE that is considered to be the working
link. However, the S/UNI-DUPLEX can override this using local control. Thus,
although the S/UNI-VORTEX may indicate the ACTIVE and spare links, it is
actually the S/UNI-DUPLEX that must effect the protection switching. See the
S/UNI-DUPLEX data sheet for additional details.
The S/UNI-DUPLEX returns an ACTIVE bit status to indicate which link it has
chosen as active. This reflected ACTIVE bit does not have a direct affect on the
S/UNI-VORTEX, but its status is debounced (must remain the same for 3
received cells) and then stored by the S/UNI-VORTEX in the Receive High-
Speed Serial Cell Filtering Configuration/Status register. The reflected status can
be used by the local control system to confirm receipt of the ACTIVE status by
the S/UNI-DUPLEX.
9.3 Cell Buffering and Flow Control
The possibility of congestion is inherent in an access multiplexer. In the
downstream direction, the WAN link can generate a burst of cells for a particular
modem at a rate far exceeding the modem’s bandwidth capacity. Therefore,
feedback to the traffic scheduler is required to cause it to buffer and smooth cell
bursts to prevent downstream buffer overflow. In the upstream direction, the
subscribed aggregate bandwidth can exceed that accommodated by the WAN
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| PM7351-BI | OCTAL SERIAL LINK MULTIPLEXER |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| PM7351-BI | 制造商:PMC 制造商全稱:PMC 功能描述:OCTAL SERIAL LINK MULTIPLEXER |
| PM-736 | 制造商:Eclipse Tools 功能描述: |
| PM7364 | 制造商:PMC 制造商全稱:PMC 功能描述:FRAME ENGINE AND DATA LINK MANAGER |
| PM7364-BI | 制造商:PMC-Sierra 功能描述:PROTOCOL CONTROLLER, 256 Pin, BGA |
| PM7366 | 制造商:PMC 制造商全稱:PMC 功能描述:FRAME ENGINE AND DATA LINK MANAGER |
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