參數(shù)資料
型號: PM7351
廠商: PMC-Sierra, Inc.
英文描述: OCTAL SERIAL LINK MULTIPLEXER
中文描述: 八路串行連接復用器
文件頁數(shù): 96/174頁
文件大?。?/td> 1790K
代理商: PM7351
RELEASED
PM7351 S/UNI-VORTEX
DATA SHEET
PMC-1980582
ISSUE 5
OCTAL SERIAL LINK MULTIPLEXER
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
86
Registers 0x080, 0x0A0, 0x0C0, 0x0E0, 0x100, 0x120, 0x140, 0x160:
Receive High Speed Serial
Configuration
Bit
Type
Function
Default
Bit 7
R/W
DDSCR
0
Bit 6
R/W
HDSCR
1
Bit 5
Unused
X
Bit 4
R/W
CNTCELLERR
0
Bit 3
R/W
CELLCRC
0
Bit 2
R/W
PREPEND
0
Bit 1
R/W
USRHDR[1]
1
Bit 0
R/W
USRHDR[0]
0
These registers configure, on a per-link basis, the format of the cells expected on
the eight RXDn+/- serial links.
USRHDR[1:0]:
The USRHDR[1:0] bits determine the length of the expected User Header
field of the received cells.
USRHDR[1:0]
Bytes in User Header
00
4
01
5
10
6
11
Reserved
PREPEND:
The PREPEND bit determines if the User Prepend field is expected to exist in
the received cells. If PREPEND is logic 1, a two byte User Prepend is
expected to follow the System Prepend field.
CELLCRC:
The CELLCRC bit determines whether the entire high speed serial data
structure is expected to be protected by a CRC-8 code word. The PREPEND
bit must be logic 1 for this bit to have effect. If CELLCRC and PREPEND are
logic 1, the second User Prepend byte is expected to contain the CRC-8
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