
RELEASED
PM7351 S/UNI-VORTEX
DATA SHEET
PMC-1980582
ISSUE 5
OCTAL SERIAL LINK MULTIPLEXER
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
143
4. If CRC-32 protection is required, set the EXTCRCPR of the Microprocessor
Extract FIFO Control and Status register to logic 0 to enable the CRC-32
process. The Extract CRC-32 accumulation register can be preset for the first
cell of a message by writing a logic 1 to EXTCRCPR prior to enable the CRC-
32 calculation. If the cell is not the first one of a message and does not
belong to the same control channel as the previous cell read, initialize the
Extract CRC-32 Accumulator Registers to the value saved from the previous
cell read for the control channel.
CRC-32 field check is done by setting the EXTCRCCHK bit of the
Microprocessor Extract FIFO Control register to logic 1. This causes the
S/UNI-VORTEX to verify that the contents of the CRC-32 Accumulator
register is equal to the expected CRC-32 remainder polynomial when the last
byte of the cell is read from the Extract FIFO. The microprocessor can verify
the CRC-32 field check result either through interrupt servicing or polling
techniques.
When interrupt servicing is used, the microprocessor enables the CRC-32
field check prior to reading the last cell of the CPCS-PDU by setting the
EXTCRCCHK bit. An interrupt is raised if a CRC-32 error is found and the
EXTCRCERRE bit is set.
When polling is used, the EXTCRCERRE bit is kept to logic 0 and CRC-32
field check is always enabled. The microprocessor verifies the value of the
EXTCRCERRI bit after reading the last cell of a CPCS-PDU.
5. Read the cell contents from the Microprocessor Cell Data register. Cell data
is extracted in the format illustrated in Fig. 7.
6. If the cell is not the last of the message, read and store the contents of the
Extract CRC-32 Accumulator register. This step is not necessary if the next
cell extracted is known to belong to the same control channel as the current
cell.
The above sequence is repeated as needed to read more cells. The assertion of
the EXTRDY[7:0] bit of an Extract FIFO indicates that the FIFO is ready again to
be read from. Setting EXTABRT of the Extract FIFO Control register to logic 1
allows the microprocessor to discard a cell without reading the remaining
contents.