PEB 20560
DSP Core OAK
Semiconductor Group
4-1
2003-08
4
DSP Core OAK
4.1
Introduction
4.1.1
General Description
OAK DSP Core is a 16-bit (data and program) busses high performance fixed-point DSP
core. OAK is designed for the mid to high-end telecommunications and consumer
electronics applications, where low-power and portability are still major requirements.
Among the applications supported by OAK are not only PBX but also digital cellular
telephones (like JDC, GSM, USDC), fast modems (like V.fast), advanced fax machines,
etc.
OAK is aimed at achieving the best cost-performance factor for a given (small) silicon
area. Taking into account ALL elements of “system-on-chip” requirements, like: program
size, data memory size, glue logic, power management, etc.
Based on the proven philosophy of its predecessor SPC, OAK is also designed to be
used as an engine for DSP-based application specific ICs. It is specified with several
levels of modularity, in RAM, ROM, and I/O, allowing efficient DSP-based ASIC
development. The core consists of the main blocks of a high performance central
processing unit, including a full featured bit-manipulation unit, RAM and ROM
addressing units, and Program control logic. All other peripheral blocks, which are
application specific, are defined as part of the user specified logic implemented around
the OAK core on the same silicon die.
OAK has an improved set of DSP and general microprocessor functions to meet the
applications requirements. The OAK programming model and instruction-set is aimed at
straightforward generation of efficient and compact code. It has an enhanced instruction
set which is upward compatible with the SPC instruction set.
OAK also features a wide range of operating voltage, down to 2.7 V. OAK is available as
a core in a standard cell library, to be utilized as a part of the user’s custom chip design.
OAK is the second member in a family of standard DSP core cells.
4.1.2
Architecture Highlights
The OAK DSP core architecture is based on its predecessor SPC. In the following
description, the
OAK new features are bold-faced
.
The OAK core consists of four parallel execution units:
the Computation Unit (CU)
the
Bit Manipulation Unit (BMU)
,
the Data Addressing Arithmetic Unit (DAAU),
the Program Control Unit (PCU).
It has two blocks of data RAM/ROM for parallel feeding of the two inputs of the multiplier.